Highly integrated semiconductor memory device

Details Highly integrated semiconductor memory device Highly integrated semiconductor memory device

1980-06-16

1984-06-19

Munson, Gene M.

357 234, 357 236, 357 2311, 357 59, 357 89, 357 91, H01L 2702, H01L 2978, H01L 2904

Patent

active

044555660

ABSTRACT:
A highly integrated semiconductor memory device of a DMOS type, in which one half of the surface area in each memory cell is used as the drain region and another half is used as the gate electrode. The channel region and the source region are formed under the gate electrode so that, the size required by one memory cell is 4F.sup.2, where F represents the minimum width of a patterning line.

REFERENCES:
patent: 4060738 (1977-11-01), Tasch et al.
patent: 4203125 (1980-05-01), Chatterjee et al.
patent: 4280855 (1981-07-01), Bertin et al.
patent: 4325180 (1982-04-01), Curran et al.
patent: 4329704 (1982-05-01), Sakurai et al.
Cauge et al., "Double-Diffused MOS Transistor Achieves Microwave Gain" Electronics (Feb. 15, 1971), pp. 99-104.

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