Higher precision divide and square root approximations

Electrical computers: arithmetic processing and calculating – Electrical digital calculating computer – Particular function performed

Reexamination Certificate

Rate now

  [ 0.00 ] – not rated yet Voters 0   Comments 0

Details

C708S504000, C708S605000

Reexamination Certificate

active

06941334

ABSTRACT:
A floating point unit includes a multiplier, an approximation circuit, and a control circuit coupled to the multiplier and the approximation circuit. The approximation circuit is configured to generate an approximation of a difference of the first result from the multiplier and a constant. The control circuit is configured to approximate a function specified by a floating point instruction provided to the floating point unit for execution using an approximation algorithm. The approximation algorithm comprises at least two iterations through the multiplier and optionally the approximation circuit. The control circuit is configured to correct the approximation from the approximation circuit from a first iteration of the approximation algorithm during a second iteration of the approximation algorithm by supplying a correction vector to the multiplier during the second iteration. The multiplier is configured to incorporate the correction vector into the first result during the second iteration.

REFERENCES:
patent: 3648038 (1972-03-01), Sierra
patent: 4725974 (1988-02-01), Kanazawa
patent: 5293558 (1994-03-01), Narita et al.
patent: 5307302 (1994-04-01), Nakano
patent: 6134574 (2000-10-01), Oberman
SiByte, “Target Applications,” http://sibyte.com/mercurian/applications.htm, Jan. 15, 2001, 2 pages.
SiByte, “SiByte Technology,” http://sibyte.com/mercurian/technology.htm, Jan. 15, 2001, 3 pages.
SiByte, “The Mercurian Processor,” http://sibyte.com/mercurian, Jan. 15, 2001, 2 pages.
SiByte, “Fact Sheet,” SB-1 CPU, Oct. 2000, rev. 0.1, 1 page.
SiByte, “Fact Sheet,” SB-1250, Oct. 2000, rev. 0.2, 10 pages.
Stepanian, SiByte, SiByte SB-1 MIPS64 CPU Core, Embedded Processor Forum 2000, Jun. 13, 2000, 15 pages.
Jim Keller, “The Mercurian Processor: A High Performance, Power-Efficient CMP for Networking,” Oct. 10, 2000, 22 pages.
Tom R. Halfhill, “SiByte Reveals 64-Bit Core For NPUs; Independent MIPS64 Design Combines Low Power, High Performance,” Microdesign Resources, Jun. 2000, Microprocessor Report, 4 pages.
SiByte, Letter from Anu Sundaresan, May 18, 2000, 1 page.
The Newton-Raphson Method, Mohamed A. Khamsi and Helmut Knaust, MethMedics, LLC. 1999-2002, 5 pages.
“Computer Architecture A Quantitative Approach,” Second Edition, Patterson and Hennessy, 1990/1996 Morgan Kaufmann Publishers, Inc., pp. A-3 to A-10, A-17 to A-32.

LandOfFree

Say what you really think

Search LandOfFree.com for the USA inventors and patents. Rate them and share your experience with other people.

Rating

Higher precision divide and square root approximations does not yet have a rating. At this time, there are no reviews or comments for this patent.

If you have personal experience with Higher precision divide and square root approximations, we encourage you to share that experience with our LandOfFree.com community. Your opinion is very important and Higher precision divide and square root approximations will most certainly appreciate the feedback.

Rate now

     

Profile ID: LFUS-PAI-O-3397180

  Search
All data on this website is collected from public sources. Our data reflects the most accurate information available at the time of publication.