Higher density insulated gate field effect circuit

Details Higher density insulated gate field effect circuit Higher density insulated gate field effect circuit

1977-02-04

1978-10-03

Larkins, William D.

Electrical transmission or interconnection systems

Nonlinear reactor systems

Parametrons

357 23, 357 41, 357 59, H03K 500, H01L 2978, H01L 2702, H01L 2904

Patent

active

041186427

ABSTRACT:
An insulated gate field effect transistor (IGFET) memory or logic circuit is implemented at higher density levels by employing thick oxide IGFET's as load elements. Additionally, the gate electrode structure of the IGFET load devices and their channel lengths with respect to the channel length of parasitic IGFET devices are selectively controlled in order to insure that the parasitic devices remain nonconductive.

REFERENCES:
patent: 3530443 (1970-09-01), Crafts et al.
patent: 3588846 (1971-06-01), Linton et al.
patent: 3610967 (1971-10-01), Palfi
patent: 3624419 (1971-11-01), Kosonooky
patent: 3694704 (1972-09-01), Ando et al.
patent: 3766448 (1973-10-01), Luce et al.
patent: 3798621 (1974-03-01), Baitinger et al.
Critchlow et al., "Design and Characteristics of N-Channel Insulated Gate Field Effect Transistors" IBM J. Res. & Develop., vol. 17 (9/73), pp. 430-442.

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