High yield, high density on-chip capacitor design

Details High yield, high density on-chip capacitor design High yield, high density on-chip capacitor design

2009-02-16

2010-12-28

Thomas, Eric (Department: 2831)

Electricity: electrical systems and devices

Electrostatic capacitors

Fixed capacitor

C361S301200, C257S303000, C257S307000

Reexamination Certificate

active

07859825

ABSTRACT:
A capacitance circuit assembly mounted on a semiconductor chip, and methods for forming the same, are provided. A plurality of divergent capacitors is provided in a parallel circuit connection between first and second ports, the plurality providing at least one Metal Oxide Silicon Capacitor and at least one Vertical Native Capacitor or Metal-Insulator-Metal Capacitor. An assembly has a vertical orientation, a Metal Oxide Silicon capacitor located at the bottom and defining a footprint, with a middle Vertical Native Capacitor having a plurality of horizontal metal layers, including a plurality of parallel positive plates alternating with a plurality of parallel negative plates. In another aspect, vertically asymmetric orientations provide a reduced total parasitic capacitance.

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