Static information storage and retrieval – Floating gate – Particular biasing
Reexamination Certificate
2011-03-15
2011-03-15
Elms, Richard (Department: 2824)
Static information storage and retrieval
Floating gate
Particular biasing
C365S185170, C365S185180, C365S185330
Reexamination Certificate
active
07907455
ABSTRACT:
Aspects describe a system and method for using a high voltage state as an erase condition in a flash device. Logical cell mapping is changed from using a single physical memory cell to using two adjacent physical cells as a single logical cell, thereby creating a single program and erase entity. Logical cell erase, program, and/or read can be accomplished by using two channel regions in union. This combination can allow for single logical cell erasure in a flash device and the use of a high voltage state as an erased state. A default erased state can be a high voltage state. As a result, program operations can be performed by changing a voltage state of the single program and erase entity to a low voltage state, and erase operations can be performed by changing a voltage state of the single program and erase entity to a high voltage state.
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Elms Richard
Nguyen Hien N
Spansion LLC
Turocy & Watson LLP
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