Electricity: electrical systems and devices – Safety and protection of systems and devices – Load shunting by fault responsive means
Reexamination Certificate
2011-06-21
2011-06-21
Salce, Patrick (Department: 2836)
Electricity: electrical systems and devices
Safety and protection of systems and devices
Load shunting by fault responsive means
C361S091100, C361S091500, C361S058000, C361S111000
Reexamination Certificate
active
07965481
ABSTRACT:
A high voltage tolerance circuit includes a first transistor, a second transistor, a third transistor, and a latch-up device. The first transistor and the second transistor are controlled by a control signal. The gate of the third transistor is coupled to a ground through the first transistor. The gate of the third transistor is coupled to an I/O pad through the second transistor. The third transistor is coupled between a power supply and a node. The latch-up device is coupled between the node and the I/O pad.
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patent: 7064942 (2006-06-01), Ker et al.
patent: 7209332 (2007-04-01), Stockinger et al.
patent: 7271988 (2007-09-01), Chung et al.
patent: 7660086 (2010-02-01), Rodgers et al.
patent: 2007/0285854 (2007-12-01), Rodgers et al.
Huang Shao-Chang
Lai Tsung-Mu
Lin Wei-Yao
e-Memory Technology, Inc.
Hsu Winston
Margo Scott
Salce Patrick
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