High-voltage switches in single-well CMOS processes

Miscellaneous active electrical nonlinear devices – circuits – and – Signal converting – shaping – or generating – Current driver

Reexamination Certificate

Rate now

  [ 0.00 ] – not rated yet Voters 0   Comments 0

Details

C327S217000

Reexamination Certificate

active

07145370

ABSTRACT:
Circuits are provided for high-voltage switching in single-well CMOS processes.

REFERENCES:
patent: 4158239 (1979-06-01), Bertin
patent: 4541073 (1985-09-01), Brice et al.
patent: 4571704 (1986-02-01), Bohac, Jr.
patent: 4758869 (1988-07-01), Eitan et al.
patent: 4935702 (1990-06-01), Mead et al.
patent: 5018102 (1991-05-01), Houston
patent: 5068622 (1991-11-01), Mead et al.
patent: 5086331 (1992-02-01), Hartgring et al.
patent: 5124568 (1992-06-01), Chen et al.
patent: 5323066 (1994-06-01), Feddeler et al.
patent: 5438542 (1995-08-01), Atsumi et al.
patent: 5659498 (1997-08-01), Pascucci et al.
patent: 5677917 (1997-10-01), Wheelus et al.
patent: 5729155 (1998-03-01), Kobatake
patent: 5731716 (1998-03-01), Pascucci
patent: 5736764 (1998-04-01), Chang
patent: 5761121 (1998-06-01), Chang
patent: 5777926 (1998-07-01), Trinh et al.
patent: 5801994 (1998-09-01), Chang et al.
patent: 5825063 (1998-10-01), Diorio et al.
patent: 5835402 (1998-11-01), Rao et al.
patent: 5841165 (1998-11-01), Chang et al.
patent: 5875126 (1999-02-01), Minch et al.
patent: 5892712 (1999-04-01), Hirose et al.
patent: 5898613 (1999-04-01), Diorio et al.
patent: 5901084 (1999-05-01), Ohnakado
patent: 5912841 (1999-06-01), Kim
patent: 5912842 (1999-06-01), Chang et al.
patent: 5912937 (1999-06-01), Goetting et al.
patent: 5914894 (1999-06-01), Diorio et al.
patent: 5966329 (1999-10-01), Hsu et al.
patent: 5982669 (1999-11-01), Kalnitsky et al.
patent: 5986927 (1999-11-01), Minch et al.
patent: 5990512 (1999-11-01), Diorio et al.
patent: 6055185 (2000-04-01), Kalnitsky et al.
patent: 6111785 (2000-08-01), Hirano
patent: 6125053 (2000-09-01), Diorio et al.
patent: 6137723 (2000-10-01), Bergemont et al.
patent: 6141247 (2000-10-01), Roohparvar et al.
patent: 6144581 (2000-11-01), Diorio et al.
patent: 6214666 (2001-04-01), Mehta
patent: 6222765 (2001-04-01), Nojima
patent: 6320788 (2001-11-01), Sansbury et al.
patent: 6331949 (2001-12-01), Hirano
patent: 6363006 (2002-03-01), Naffziger et al.
patent: 6363011 (2002-03-01), Hirose et al.
patent: 6384451 (2002-05-01), Caywood
patent: 6452835 (2002-09-01), Diorio et al.
patent: 6456992 (2002-09-01), Shibata et al.
patent: 6469930 (2002-10-01), Murray
patent: 6477103 (2002-11-01), Nguyen et al.
patent: 6573765 (2003-06-01), Bales et al.
patent: 6590825 (2003-07-01), Tran et al.
patent: 6633188 (2003-10-01), Jia et al.
patent: 6654272 (2003-11-01), Santin et al.
patent: 6661278 (2003-12-01), Gilliland
patent: 6664909 (2003-12-01), Hyde et al.
patent: 6693819 (2004-02-01), Smith et al.
patent: 6724657 (2004-04-01), Shukuri
patent: 6741500 (2004-05-01), DeShazo et al.
patent: 6822894 (2004-11-01), Costello et al.
patent: 6845029 (2005-01-01), Santin et al.
patent: 6946892 (2005-09-01), Mitarashi
patent: 2002/0122331 (2002-09-01), Santin et al.
patent: 2003/0123276 (2003-07-01), Yokozeki
patent: 2003/0206437 (2003-11-01), Diorio et al.
patent: 2004/0004861 (2004-01-01), Srinivas et al.
patent: 2004/0021166 (2004-02-01), Hyde et al.
patent: 2004/0037127 (2004-02-01), Lindhorst et al.
patent: 2004/0052113 (2004-03-01), Diorio et al.
patent: 2005/0149896 (2005-07-01), Madurawe
patent: 0 326 883 (1989-08-01), None
patent: 0 336 500 (1989-10-01), None
patent: 0 756 379 (1997-01-01), None
Invitation to Pay Additional Fees (Partial International Search), Application No. PCT/US 03/31792, date of mailing Apr. 22, 2004.
Declercq, et al., “Design and Optimization of High-Voltage CMOS Devices Compatible with a Standard 5 V CMOS Technology”, IEEE Custom Integrated Circuits Conference, 1993, pp. 24.6.1-24.6.4.
Dickson, “On-Chip High-Voltage Generation in MNOS Integrated Circuits Using an, Improved Voltage Multiplier Technique”, IEEE Journal of Solid-State Circuits, vol. SC-11, No. 3, Jun. 1976, pp. 374-378.
Witters, et al., “Analysis and Modeling of On-Chip High-Voltage Generator Circuits for Use in EEPROM Circuits”, IEEE Journal of Solid-State Circuits, vol. 24, No. 5, Oct. 1989, pp. 1372-1380.
Carley, L. Richard, “Trimming Analog Circuits Using Floating-Gate Analog MOS Memory”, IEEE Journal of Solid-State Circuits, vol. 24, No. 6, pp. 1569-1575, Dec. 1989.
Partial International Search for International Application No. PCT/US03/31792, date mailed Apr. 2, 2004.
Raszka, Jaroslav, et al., “Embedded Flash Memory for Security Applications in a 0.13 μm CMOS Logic Process”, IEEE 2004 International Solid-State Circuits Conference, Feb. 16, 2004, pp. 46-47.
International Search Report for International Application No. PCT/US05/10434, date of mailing Sep. 13, 2005.
International Search Report for International Application No. PCT/US2005/010432, date of mailing Sep. 27, 2005.
International Search Report for International Application No. PCT/US2005/010431, date of mailing Sep. 27, 2005.
International Search Report for International Application No. PCT/US03/31792, date of mailing Aug. 12, 2004.

LandOfFree

Say what you really think

Search LandOfFree.com for the USA inventors and patents. Rate them and share your experience with other people.

Rating

High-voltage switches in single-well CMOS processes does not yet have a rating. At this time, there are no reviews or comments for this patent.

If you have personal experience with High-voltage switches in single-well CMOS processes, we encourage you to share that experience with our LandOfFree.com community. Your opinion is very important and High-voltage switches in single-well CMOS processes will most certainly appreciate the feedback.

Rate now

     

Profile ID: LFUS-PAI-O-3720131

  Search
All data on this website is collected from public sources. Our data reflects the most accurate information available at the time of publication.