Electrical transmission or interconnection systems – Switching systems – Condition responsive
Reexamination Certificate
1998-06-22
2001-03-20
Ballato, Josie A. (Department: 2836)
Electrical transmission or interconnection systems
Switching systems
Condition responsive
Reexamination Certificate
active
06204576
ABSTRACT:
BACKGROUND OF THE INVENTION
1. Field of the Invention
The present invention relates to a switch circuit, and particularly to a discharge circuit for a high-voltage switch circuit.
2. Description of the Prior Art
A high-voltage switch circuit is conventionally used in programmable integrated circuits, such as flash memory devices, for propagating a high voltage to word lines or source lines in order to perform programming or erasing function.
FIG. 1
shows a schematic diagram illustrating a typical high-voltage switch circuit
10
conventionally used in flash memory devices. Switch signals SW
1
and SW
2
are generally global signals, which are used to control switch transistors N
6
and N
7
, respectively, along with other similar transistors, for example, of the same row of the flash memory cell array. Generally, the switch signal SW
1
is the inverse of the other switch signal SW
2
. In this diagram, the output terminals of the switch transistors N
6
and N
7
, designated as OUT
1
and OUT
2
are coupled to a source line or a word line (not shown). Under the control of the switch transistors N
6
and N
7
with the signals SW
1
and SW
2
, a high voltage source HV
1
, which is a global high voltage source generated by a pumping circuit (not shown), can be propagated to the output terminal OUT
1
or OUT
2
. In order to effectively transmit the high voltage HV
1
to node D, a local pumping circuit
102
is used to pump (or raise) the voltage level at node C. A two-stage cascade pumping circuit
102
such as that shown in
FIG. 1
is usually used, in which clock signal pair of CLK and CLKn (inverted CLK) is provided as a pumping clock pair.
During circuit operation, considering the switch signal SW
1
being, at high voltage level and the output terminal OUT
1
being connected to the ground, there is a discharge path from node A through nodes B, C and D to the ground. The situation mentioned above is usually referred to as being unselected, compared to a selected situation wherein the voltage potential at the output terminal OUT
1
is high. Concerning the unselected situation, the nodes A, B, and C will not be pumped to high voltage. Further, with the transistors N
5
and N
6
, the voltage of the node C will remain zero no matter how the clock CLKn changes. It is worth noting that the passing gate N
0
in the switch circuit
10
will not conduct be cause of the zero voltage at the node C, therefore prohibiting the high voltage HV
1
from propagating to the output terminal OUT
1
.
Accordingly, the node A becomes almost floating, and therefore the voltage level of the node A will unwontedly vary with the change of the clock CLK. More specifically, when the clock CLK rises, the node A will be coupled through the capacitor K
1
, and the voltage at the node A rises a little above zero; when the clock CLK falls, the node A will also be coupled through the capacitor K
1
, and the voltage at the node A then falls a little below zero. A simulation result of the high voltage sources HV
1
and HV
2
is shown in FIG.
2
. Due to the fact that the node C remains zero as discussed above, the negative voltage at the node A will weakly turn on the transistor N
1
, thereby sinking some current from another high voltage source HV
2
and affecting its pumping circuit (not shown). As the number of the memory cells and their corresponding switch circuits is more than hundreds of thousand, the total sum of these sink currents becomes significant and intolerable, thereby degrading the pumping efficiency of the pumping circuit of the high voltage source HV
2
, or even failing the programming and erasing function in the flash memory devices. Therefore, a need has been arisen to provide a scheme for overcoming these deficiencies.
SUMMARY OF THE INVENTION
In accordance with the present invention, a high-voltage switch circuit is provided so that the undesired swing of high-voltage source and the substantial current sinking therefrom can be reduced, thereby increasing the efficiency of the pumping circuit of the high-voltage sources. In one embodiment, the present invention includes at least one voltage source input terminal for providing at least one voltage source, and a passing circuit configured to controllably pass the voltage source. Further, the present invention also includes a multi-stage cascade pumping circuit configured to raise voltage level of one output terminal thereof by at least a pair of clock signals inputting to the multi-stage cascade pumping circuit. At least one switch circuit under control of a switch signal is used so that the voltage source controllably propagates to one output terminal of the switch circuit through the passing circuit, wherein the output terminal of the switch circuit is coupled to a word line or a source line of a flash memory device. Finally, an equalizing circuit is configured to force the output terminal of the multi-stage cascade pumping circuit and one internal node of the multi-stage cascade pumping circuit to an equal potential, so that the voltage source propagates to the output terminal of the switch circuit through the equalizing circuit when the output terminal of the switch circuit is coupled to a ground.
REFERENCES:
patent: 5811990 (1998-09-01), Blodgett et al.
patent: 5905402 (1999-05-01), Kim et al.
patent: 5930175 (1999-07-01), Lakhani et al.
patent: 5978283 (1999-11-01), Hsu et al.
Chih Yue-Der
Chou Yung-Fa
Ballato Josie A.
DeBeradinis Robert L.
Nath & Associates
Novick Harold L.
Taiwan Semiconductor Manufacturing Co. Ltd.
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