High voltage protection for an integrated circuit input buffer

Electricity: electrical systems and devices – Safety and protection of systems and devices – With specific voltage responsive fault sensor

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361111, H02H 320

Patent

active

059739002

ABSTRACT:
Connection of a reference voltage to an inverter of an input buffer is controlled to protect the buffer from damage due to high voltage connected to the buffer so that the inverter is isolated from the reference voltage for application of the high voltage. A supply voltage may be connected to the inverter to ensure the output state of the buffer when the inverter is isolated from the reference voltage. In particular, an input buffer including an inverter having at least one p-channel and at least two n-channel transistors connected in series between a supply voltage and a reference voltage is protected from damage due to high voltage by floating the source and drain of n-channel transistors connected to receive input signals to be buffered. A control signal indicating a high voltage is connected to the buffer turns off the last n-channel transistor in the series chain of transistors and thereby removes the reference voltage from any remaining n-channel transistors in the chain. To ensure the state of the output of the buffer circuit while the n-channel transistors are thus isolated or floating, the drain of the first n-channel transistor in the series chain of transistors is clamped to the supply voltage. A p-channel transistor is connected between the drain of the first n-channel transistor in the chain and the supply voltage to provide the supply voltage clamp in response to the control signal.

REFERENCES:
patent: 4704547 (1987-11-01), Kirsch
patent: 5257222 (1993-10-01), Lee
patent: 5331196 (1994-07-01), Lowrey et al.
patent: 5341033 (1994-08-01), Koker
patent: 5381056 (1995-01-01), Murphy
patent: 5493244 (1996-02-01), Pathak et al.
patent: 5535086 (1996-07-01), Mentzer
patent: 5578941 (1996-11-01), Sher et al.

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