High voltage protection circuit

Details High voltage protection circuit High voltage protection circuit

2000-07-06

2003-10-21

Toatley, Jr., Gregory J. (Department: 2836)

Electricity: electrical systems and devices

Safety and protection of systems and devices

With specific voltage responsive fault sensor

C257S549000, C257S371000

Reexamination Certificate

active

06636402

ABSTRACT:

FIELD OF THE INVENTION
The present invention relates to integrated circuits in general, and more specifically to a circuit used to protect against high voltages as may be used, for example, in programming or erasing a nonvolatile memory.
BACKGROUND OF THE INVENTION
Non-volatile memories generally require a much higher voltage to write or erase a memory cell than is used as the main power supply to the chip. For example, the main supply voltage to the chip (Vdd) may be 3V or 5V, while an erase or programming operation requires application of 12-48V on the drain and/or [drain] of the transistor to be written. Charge pumps are typically employed to generate the higher voltages from the main power supply voltage. During a write operation, it is important that those memory cells which are not to be written are protected from the higher voltage. Furthermore, operation of the charge pumps can be quite sensitive to leakage such that protection circuits are sometimes needed to prevent such leakage.
One conventional protection circuit utilises two transistor in series, with the goal being that these transistors remain in their off state during application of the programming voltage. A simplified circuit diagram of such a protection circuit is shown in
FIG. 1. A
high voltage protection circuit
10
includes a first transistor
12
whose gate and source of transistor
12
are coupled to ground or Vss. The circuit also includes a second transistor
14
having its drain coupled to the high voltage being supplied (Vhv), its source coupled to the drain of transistor
12
, and its gate coupled to a voltage labeled Vcas, because transistor
14
is also sometimes referred to as a cascode transistor. When Vhv is applied, second transistor
14
remains in an off state and shields transistor
12
from Vhv, which might otherwise be higher than the breakdown voltage of transistor
12
. Second transistor
14
provides protection by ensuring that the voltage at the drain of first transistor
12
is below the breakdown voltage of transistor
12
. This is ensured when the source of second transistor
14
, and thus the drain of first transistor
12
, does not rise above a voltage level equal to Vcas minus the threshold voltage (Vth) of second transistor
14
.
Traditionally, Vcas was equal to Vdd, the main power supply voltage of the chip, because routing of this voltage to the protection circuit was very easy since the supply voltage is present in virtually every part of the chip. However, with the advancement of semiconductor manufacturing processes came the need for lower supply voltages (e.g. <3V), such that using Vdd as Vcas no longer offered high voltage protection because second transistor
14
would prematurely breakdown, thereby exposing first transistor
12
to Vhv.
To improve the performance of protection circuit
10
, Vcas can be raised to a voltage higher than Vdd but lower than Vhv. This intermediate voltage is sometimes referred to as a “stand-off” voltage (Vso) which is also generated from a charge pump. While Vso can be chosen to offer effective breakdown and high voltage protection, use of an intermediate voltage requires additional circuitry to generate Vso and additional routing to route Vso to all the protection transistors in the memory array. This additional circuitry and routing adversely affects chip size, which in turn increases manufacturing costs. Accordingly, it would be desirable to have a high voltage protection with minimum additional routing and circuitry which can be used in conjunction with integrated circuits having very low power supply voltages (e.g. <3V).


REFERENCES:
patent: 5497023 (1996-03-01), Nakazato et al.
patent: 5679971 (1997-10-01), Tamba et al.
patent: 6055205 (2000-04-01), Rao et al.

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