High voltage power IC process

Details High voltage power IC process High voltage power IC process

1989-06-06

1990-03-13

Hearn, Brian E.

Fishing, trapping, and vermin destroying

437 67, 437 54, 437 78, 437 90, 357 55, 148DIG12, 148DIG26, 148DIG135, H01L 2120, H01L 21302

Patent

active

049083287

ABSTRACT:
A process is disclosed for forming an oxide isolated semiconductor wafer which can include the formation of an associated high voltage transistor. The same wafer can include a plurality of low voltage transistors which can be connected in the form of circuitry that can control the high voltage transistor. Thus, a single IC chip can be fabricated for a power control function. The process includes bonding a first wafer to a second wafer using oxide (11/14), forming a groove (18) through the oxide (15), backfilling with epitaxially regrown semiconductor (19) to provide a high voltage section, and subsequently forming the high voltage transistor, e.g. NPN or DMOS devices, in said section.

REFERENCES:
patent: 4501060 (1985-02-01), Frye et al.
patent: 4593458 (1986-06-01), Adler
patent: 4837186 (1989-06-01), Ohata et al.
patent: 4851366 (1989-07-01), Blanchard
Ohata, Y., et al., "Dielectrically Isolated Intelligent Power Switch," IEEE 1987 Custom Int. Cir. Conference, pp. 443-446.
Ohashi, H., et al., "Improved Dielectrically Isolated Device Integration", IEEE IEDM Tech. Digest, 1986, pp. 210-213.

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