Static information storage and retrieval – Floating gate – Particular biasing
Reexamination Certificate
2007-04-03
2007-04-03
Hur, J. H. (Department: 2824)
Static information storage and retrieval
Floating gate
Particular biasing
C365S185330, C365S185250, C365S204000
Reexamination Certificate
active
11080351
ABSTRACT:
An erase discharge circuit in a flash memory is coupled to an array source and a p-well drive and receives first and second discharge signals. The erase discharge circuit operates during a discharge cycle in a first mode in response to the first discharge signal to couple the first node to the second node and to discharge voltages on the first and second nodes at a first rate. The erase discharge circuit operates in a second mode in response to the second discharge signal to couple the first node to the second node to discharge the voltages on the first and second nodes at a second rate.
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Gualandri Stephen J.
Pekny Theodore T.
Dorsey & Whitney LLP
Hur J. H.
Micro)n Technology, Inc.
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