High voltage MOSFET with inter-device isolation structure

Details High voltage MOSFET with inter-device isolation structure High voltage MOSFET with inter-device isolation structure

1979-05-30

1981-09-15

Wojciechowicz, Edward J.

357 23, 357 24, 357 45, 357 50, 357 51, 357 52, 357 53, 357 55, 357 56, 357 68, 357 91, H01L 2702

Patent

active

042900778

ABSTRACT:
Integrated monolithic arrays of high voltage metal oxide semiconductor field effect transistors having closed geometry grounded peripheries for inter-device isolation are able to function as drivers that may be switched on and off. The HVMOSFET includes DMOS-like structures with separate channel and drift regions, closed geometry configurations with center drains and split oxide topography having relatively thin oxide under a field plate and over a drift region for surface depletion and high voltage field inversion preclusion respectfully. The infra described HVMOSFET is able to route high voltage lines therein for operative connection to the high voltage terminals thereof while providing inter-device isolation from the fields generated by the HV lines.

REFERENCES:
patent: 3909320 (1975-09-01), Cauge et al.
patent: 4017883 (1977-04-01), Ho et al.

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