High voltage MOS switch circuit with isolation

Details High voltage MOS switch circuit with isolation High voltage MOS switch circuit with isolation

1986-10-09

1988-01-26

Miller, Stanley D.

Electrical transmission or interconnection systems

Nonlinear reactor systems

Parametrons

307572, H03K 17687

Patent

active

047218711

ABSTRACT:
A high voltage switch circuit, wherein the source of a first MOS transistor is connected to the gate of a second MOS transistor, the source of the second MOS transistor is connected to the gate of the first MOS transistor, the drain of a third MOS transistor and the gate of a fourth MOS transistor, the drains of the first and fourth MOS transistors are connected to a high voltage input terminal, the sources of the third and fourth MOS transistors are connected to an output terminal, a voltage for turning the transistor ON is applied to the gate of the third MOS transistor, one electrodes of two independent capacitors are connected to the gates of the first and second MOS transistors, and a clock is applied through transmission gates to the other electrode of the two capacitors.

REFERENCES:
patent: 4494015 (1985-01-01), Frieling et al.
patent: 4570085 (1986-02-01), Redfield
"Session XIII. Nonvolatile Memory", Donaldson et al., 1983 IEEE International Solid-State Circuits Conference, pp. 168-169.
1983 IEEE International Solid-State Circuits Conference.

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