Patent
1988-03-09
1990-05-15
Wojciechowicz, Edward J.
357 2314, 357 41, 357 50, 357 52, 357 53, 357 54, 357 55, 357 237, H01L 2504
Patent
active
049262432
ABSTRACT:
A high voltage MOS field-effect semiconductor device comprising, as formed on a single seimconductor substrate a high voltage first MOS field-effect transistor and a conventional second MOS field-effect transistor operable at a lower voltage than the first transistor. The semiconductor substrate is covered with an aluminum or like conductor layer over the region thereof where the conventional second field-effect transistor is located.
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patent: 4519050 (1985-05-01), Folmsbee
patent: 4536941 (1985-08-01), Kuo et al.
A. G. Fortino et al., Method of Making a Submicron Field-Effect Transistor, IBM Technical Disclosure Bulletin, vol. 23, No. 2, pp. 534-556, (Jul., 1980).
T. Yamaguchi et al., Process and Device Design of a 1000-V MOS IC, IEEE Transactions on Electron Devices, vol. ED-29, No. 8, pp. 1171-1178, (Aug. 1982).
L. D. Hartsough et al., Aluminum and Aluminum Alloy Sputter Deposition for VLSI, Solid State Technology, pp. 66-72, (Dec., 1979).
Kawano Kenzo
Nakagawa Kiyotoshi
Sharp Kabushiki Kaisha
Wojciechowicz Edward J.
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