Static information storage and retrieval – Floating gate – Particular biasing
Reexamination Certificate
2002-08-27
2003-12-30
Tran, Andrew Q. (Department: 2824)
Static information storage and retrieval
Floating gate
Particular biasing
C365S185200, C365S185250, C365S185330
Reexamination Certificate
active
06671206
ABSTRACT:
RELATED APPLICATIONS
This application claims priority to Italian Patent Application Serial No. RM2001A000531, filed Aug. 29, 2001, entitled “High Voltage Low Power Sensing Device For Flash Memory.”
This application is related to U.S. patent application Ser. No. 10/036,751, filed Dec. 21, 2001, entitled “Sensing Scheme for Low-Voltage Flash Memory” and commonly assigned.
TECHNICAL FIELD OF THE INVENTION
The present invention relates generally to semiconductor memory devices, and in particular, the present invention relates to sensing schemes in semiconductor flash memory devices.
BACKGROUND OF THE INVENTION
Semiconductor memory devices are rapidly-accessible memory devices. In a semiconductor memory device, the time required for storing and retrieving information generally is independent of the physical location of the information within the memory device. Semiconductor memory devices typically store information in a large array of cells. A group of cells are electrically connected together by a bit line, or data line. An electrical signal is used to program a cell or cells.
Computer, communication and industrial applications are driving the demand for memory devices in a variety of electronic systems. One important form of semiconductor memory device includes a non-volatile memory made up of floating-gate memory cells called flash memory. Computer applications use flash memory to store BIOS firmware. Peripheral devices such as printers store fonts and forms on flash memory. Digital cellular and wireless applications consume large quantities of flash memory. Portable applications such as digital cameras, audio recorders, personal digital assistants (PDAs) and test equipment also use flash memory as a medium to store data.
To achieve increasing performance requirements and to lower power demands, components of the memory device have been scaled down in terms of size and operating voltages. Unless the voltage supplied to the memory device is matched to the operating voltages of the components, care must be taken to avoid failures or errors within the device.
Sensing a data value of a memory cell in a flash memory device often includes a precharging operation where the bit line containing the target memory cell is precharged to some precharge potential. This precharge is often the supply potential. It is important that this precharge potential achieved on the bit line not be of a magnitude that will cause a read disturb, i.e., a partial programming, of the memory cells when its word line is driven. Even small accumulations of charge on the floating gate of the flash memory cell may be accumulated over several sensing operations such as to alter the data value stored in the cell. For reliability of the memory device, it is thus extremely important to mitigate such read disturb effects.
For the reasons stated above, and for other reasons stated below which will become apparent to those skilled in the art upon reading and understanding the present specification, there is a need in the art for alternative sensing devices for integrated-circuit memory devices, memory devices containing such sensing devices, and methods of their operation.
SUMMARY OF THE INVENTION
The above-mentioned problems with memory devices and other problems are addressed by the present invention and will be understood by reading and studying the following specification.
Single-ended sensing devices for sensing a programmed state of a floating-gate memory cell are described herein for use in high-voltage, low-power memory devices. Low-power memory devices rely on memory cells that operate at low voltages. However, some electronic systems may still provide higher supply potentials for operation of the memory device, e.g., 3V nominal. The drains of the memory cells must be protected from these higher supply potentials during sensing to avoid read disturb errors. One approach would be to provide a separate power supply, generated on-chip, to provide lower voltages during sensing. This approach, however, would result in a current draw from the external supply potential even during standby modes. The various embodiments of the invention provide protection of the memory cells from high external power supplies without the need to provide separate generation of lower potentials on-chip.
Sensing devices in accordance with the invention are adapted to accept supply potentials significantly higher than the maximum potential to be achieved on a bit line during a sensing operation. Sensing devices in accordance with the various embodiments include an input node selectively coupled to a floating-gate memory cell and an output node for providing an output signal indicative of the programmed state of the floating-gate memory cell. Such sensing devices further include a feedback loop coupled between a precharge path and the input node of the sensing device. The feedback loop limits the potential level achieved at the input node of the sensing device, thus limiting the potential level achieved by the bit lines during sensing.
The invention further provides memory devices and electronic systems making use of such sensing devices. The invention still further provides methods and apparatus of varying scope.
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De Santis Luca
Vali Tommaso
Leffert Jay & Polglaze P.A.
Tran Andrew Q.
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