High voltage junction semiconductor device fabrication

Details High voltage junction semiconductor device fabrication High voltage junction semiconductor device fabrication

1975-06-16

1977-04-26

Tupman, W.

Metal working

Method of mechanical manufacture

Assembling or joining

29580, 29588, 357 55, B01J 1700

Patent

active

040192482

ABSTRACT:
The peripheral boundary of a plane pn junction of a semiconductor device, for example, the base-collector junction of a transistor, that is required to withstand high reverse voltages in operation of the device is defined by a channel having a side-wall defining the peripheral boundary of the junction. The channel is formed by firstly mechanically cutting a desired contour channel into a surface of a semiconductor body which has the junction formed therein. The channel is then subjected to chemical etching to remove semiconductor material damaged as a result of the mechanical cutting step and the channel is filled with an insulating glass to provide a protective coating over the pn junction and prevent contamination of the junction by a subsequently applied epoxy resin encapsulant for the device.

REFERENCES:
patent: 3112850 (1963-12-01), Garibotti
patent: 3421922 (1969-10-01), Legat
patent: 3559006 (1971-01-01), Otsuka
patent: 3596348 (1971-08-01), Solihull
patent: 3738877 (1973-06-01), Davisohn
patent: 3750269 (1973-08-01), Small
patent: 3795045 (1974-03-01), Dumas

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