1984-07-30
1986-09-16
Edlow, Martin H.
357 51, 357 54, H01L 2702, H01L 2934
Patent
active
046125639
ABSTRACT:
High voltage integrated circuit field plates that are connected directly to the epitaxial pockets over which they lie, are formed simultaneously with high resistivity polysilicon resistors and are insulated from cross-over metal by a dual insulation of silicon dioxide and silicon nitride. Without adding to these process steps, MNS capacitors are formed that have a higher packing density than their MOS counterparts. The space saving MNS capacitors are thus space-wise and process-wise compatible with the polysilicon field plates that occupy much less chip real estate than do diffused channel stops.
REFERENCES:
patent: 3602782 (1971-08-01), Klein
patent: 3841926 (1974-10-01), Garnache et al.
patent: 4001869 (1977-01-01), Brown
patent: 4256515 (1981-03-01), Miles et al.
patent: 4513304 (1985-04-01), Takemae
Antipov, IBM Technical Disclosure Bulletin, vol. 17, No. 1, Jun. 1974, pp. 102-103.
Cooper Richard B.
Macdougall John D.
Edlow Martin H.
Henn Terri M.
Sprague Electric Company
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