High voltage input buffer circuit using low voltage transistors

Details High voltage input buffer circuit using low voltage transistors High voltage input buffer circuit using low voltage transistors

1998-01-29

2000-05-30

Callahan, Timothy P.

Miscellaneous active electrical nonlinear devices, circuits, and

Signal converting, shaping, or generating

Amplitude control

327312, 327319, 327333, H03K 1716

Patent

active

060695153

ABSTRACT:
An input buffer circuit implemented with low voltage transistors, that is capable of receiving and recognizing input logic signals having higher voltage levels is disclosed. The present invention uses various circuit techniques to ensure that no transistor in the input buffer circuitry undergoes voltages higher than that allowed by the fabrication process, even though the input signal voltage may swing well beyond the tolerable voltage levels. This is accomplished without compromising the reliability of the input buffer circuit in detecting the logic levels of the input signal.

REFERENCES:
patent: 3369129 (1968-02-01), Wolterman
patent: 5742183 (1998-04-01), Kuroda
patent: 5789942 (1998-08-01), Mizuno
Connor et al., "Dynamic Dielectric Protection for I/O Circuits Fabricated in a 2.5V CMOS Technology Interfacing a 3.3V LVTTL Bus," 1997 Symposium on VLSI Circuits Digest of Technical Papers, pp. 119-120.

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