High voltage detection circuit

Electrical transmission or interconnection systems – Personnel safety or limit control features – Interlock

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307450, 307581, H03K 524, H03K 1730, H03K 17687

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active

043180132

ABSTRACT:
An N-channel MOS high voltage detection circuit generates an output when an input voltage (Vin) exceeds a supply voltage (V.sub.DD) by a desired offset voltage. The crossover detection is delayed by pumping more current into an output producing node via a lower resistance field effect transistor having a gate coupled to the input voltage. The output is finally produced when the effect of this transistor is overcome by a second field effect transistor. Switching characteristics may be sharpened by placing a voltage limiting field effect transistor between Vin and the gate of the low resistance field effect transistor.

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Harroun, IBM Technical Disclosure Bulletin, vol. 20, No. 7, pp. 2603-2605; 12/1977.
Chu et al., IBM Technical Disclosure Bulletin, vol. 18, No. 3; 8/1975, pp. 710-711.
Danielski et al., IBM Techanical Disclosure Bulletin, vol. 18, No. 4, pp. 1033-1034; 9/1975.

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