High voltage decoder

Electrical transmission or interconnection systems – Nonlinear reactor systems – Parametrons

Patent

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Details

307475, 307200B, 307585, 307264, G11C 8000, H03K 19092, H03K 17687

Patent

active

046895043

ABSTRACT:
A high voltage CMOS decoder and level translator for use in conjunction with EPROMS and EEPROMS utilizes additional series coupled field effect transistors maintained in an on condition so a to prevent the voltage across the pull-up and pull-down field effect transistors from exceeding their break down voltages. For example, in addition to a pull-up P-channel field effect transistor and a pull-down N-channel field effect transistor in the output inverter circuit, additional P-channel and N-channel field effect transistors are coupled in series between the pull-up and pull-down transistors to maintain the voltage across the pull-up and pull-down transistors from exceeding there breakdown voltages.

REFERENCES:
patent: 3942043 (1976-03-01), Sirocka et al.
patent: 4468576 (1984-08-01), Takemac
patent: 4508978 (1985-04-01), Reddy

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