High voltage circuits in low voltage CMOS process

Details High voltage circuits in low voltage CMOS process High voltage circuits in low voltage CMOS process

1982-05-10

1984-12-25

Miller, Stanley D.

Electrical transmission or interconnection systems

Nonlinear reactor systems

Parametrons

307446, 307570, 307579, 307585, 357 23, H03K 19003, H03K 19094, H03K 19092, H03K 1710

Patent

active

044906293

ABSTRACT:
A CMOS push-pull output buffer (171) is constructed utilizing a plurality of N channel transistors (74, 75, 76) and a plurality of P channel transistors (71, 72, 73) connected in series. The voltages applied to the gates of the N channel transistors and P channel transistors are selected to divide the high voltage (+V) substantially equally across the P channel transistors, when the P channel transistors are turned off, and substantially evenly divide the high voltage across the N channel transistors, when the N channel transistors are turned off.
In another embodiment of this invention, selected ones of the N channel and P channel transistors are formed in order to have a high drain to bulk breakdown voltage.
In another embodiment of this invention, a plurality of N channel and a plurality of P channel transistors are connected in series and driven by a single ended control voltage (C.sub.N), thus providing a first stage (101) which drives a second stage (100) having a plurality of P channel transistors and a plurality of N channel transistors (110, 111, 112), which provide the high voltage output voltage.
In another embodiment of this invention, the first stage (101) is driven by a single ended control voltage (C.sub.N) and serves to drive a second stage (103) comprising a plurality of N channel transistors (110, 111, 112) and a plurality of bipolar transistors (120, 121), whereby said second stage provides the high voltage output signal.

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Heisig, "Bimos-A New Way to Simplify High-Power Custom Interface", Proceeding of 1981 CICC, pp. 8-12.
Yamaguchi et al., "Process and Device Design of a 1000-Volt MOS IC", IEDM Tech. Dig., pp. 255-258, (1981).
Buhler et al., "Integrated High Voltage/LOS Voltage MOS Devices", IEDM Tech. Dig., pp. 259-262, (1981).

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