Electric power conversion systems – Current conversion – Including d.c.-a.c.-d.c. converter
Reexamination Certificate
2001-08-20
2002-08-13
Han, Jessica (Department: 2838)
Electric power conversion systems
Current conversion
Including d.c.-a.c.-d.c. converter
C363S021120
Reexamination Certificate
active
06434022
ABSTRACT:
BACKGROUND OF THE INVENTION
1. Field of the Invention
The present invention relates to a high voltage generation circuit and, more particularly, to a high voltage generation circuit for generating a high voltage to be supplied to a CRT (cathode ray tube) or the like.
2. Description of the Related Art
FIG. 1
is a circuit diagram showing an example of a high voltage generation circuit as the background of the present invention. The high voltage generation circuit
10
includes a transformer
12
. The primary winding of the transformer
12
is connected to the anode of a diode
14
. The cathode of the diode
14
is connected to the drain of FET
16
as a switching element. The source of the FET
16
is connected to a resistor
18
. The other side of the resistor
18
is grounded. A diode
20
is connected in parallel to the series circuit comprising the diode
14
, the FET
16
, and the resistor
18
. The cathode of the diode
20
is connected to the anode side of the diode
14
. The anode of the diode
20
is grounded.
A series circuit comprising a resonance capacitor
22
and a diode
24
is connected in parallel to the diode
20
. One end of the resonance capacitor
22
is connected to the anode side of the diode
14
, and the other end of the resonance capacitor
22
is connected to the cathode of the diode
24
. The anode of the diode
24
is grounded. Moreover, the node between the resonance capacitor
22
and the diode
24
is connected to the anode of another diode
26
. The cathode of the diode
26
is connected to the primary winding of the transformer
12
via a ringing suppression circuit
28
. The ringing suppression circuit
28
comprises a capacitor
30
, a resistor
32
, and an inductor
34
. A power supply+B is connected between the diode
26
and the ringing suppression circuit
28
. The node between the diode
26
and the ringing suppression circuit
28
is grounded via a capacitor
36
and an electrolytic capacitor
38
.
To the gate of the FET
16
, a signal for on and off control thereof is provided from a PWM (Pulse Width Modulation) control circuit
40
. Voltage produced by dividing a secondary output voltage of the transformer
12
is input to the PWM control circuit
40
. This voltage and a horizontal driving signal are input to the PWM control circuit
40
. The PWM control circuit
40
generates a control signal for controlling the FET
16
. A node between the FET
16
and the resistor
18
is connected to a protection circuit provided in the PWM control circuit
40
, so that an over-current flowing in the circuit is detected.
FIG. 2
shows waveforms at the respective portions of the high voltage generation circuit
10
. FIGS.
2
(
a
), (
b
), and (
c
), respectively represent the waveform chart of a signal for controlling the FET
16
, the voltage at point A shown in
FIG. 1
, and the current flowing through the primary winding of the transformer
12
. First, when the FET
16
is turned on at t
0
, current flows from the power supply+B through the diode
14
, the FET
16
, and the resistor
18
. Electromagnetic energy is stored in the primary winding of the transformer
12
, due to the current.
The FET
16
is turned off at t
1
. At this time, current flows from the primary winding of the transformer
12
through the resonance capacitor
22
and the diode
26
, and the primary winding of the transformer
12
and the resonance capacitor
22
start to resonate. As shown in the waveform chart of FIG.
2
(
b
), a flyback pulse is generated. The flyback pulse becomes maximum when all of the electromagnetic energy stored in the transformer
12
is converted to electrostatic energy of the resonance capacitor
22
.
After all of the electromagnetic energy stored in the primary winding of the transformer
12
is transferred to the capacitor
22
, reverse current flows through the diode
24
, the resonance capacitor
22
, and the primary winding of the transformer
12
. Thus, the electrostatic energy in the resonance capacitor
22
is reversely converted to the electromagnetic energy in the primary winding of the transformer
12
. At this time, the diode
14
prevents electric charge stored in the parasitic capacitance of the FET
16
from flowing out toward the primary winding side.
At t
2
when the flyback pulse is completed, the potential at the point A becomes zero. Then, the diode
20
is turned on, so that current flows from the ground side of the diode
20
into the primary winding of the transformer
12
. The current increases the voltage at the point A. The voltage at the point A has the same potential as that of the power supply+B at t
3
. At this time, the diode
20
is turned off, and the current becomes zero. Then, as regards the flow of current from the power supply+B into the resonance capacitor
22
, the potential at both ends of the resonance capacitor
22
is clamped to the voltage of the power supply+B by a current-blocking clamp circuit comprising the diodes
24
and
26
, so that no current flows from the primary winding of the transformer
12
into the resonance capacitor
22
. Then, the FET
16
is turned on at t
4
, so that current flows from the power supply+B toward the primary winding, and the circuit returns to the initial state at t
0
. This operation is repeated. Thus, the circuit operation is continued. Accordingly, the voltage of the flyback pulse is increased by the transformer
12
, so that high voltage is output from the secondary winding.
Capacitances included in the circuit, such as the parasitic capacitance in the FET
16
, exist at t
3
when the current becomes zero. Accordingly, resonance with the primary winding of the transformer
12
occurs, and a quiescent ringing pulse is generated during the time from t
3
to t
4
. The ringing suppression circuit
28
is used to suppress the ringing vibration pulse.
In the high voltage generation circuit
10
, the primary inductance Lp of the transformer
12
is designed so as to satisfy the condition of Lp≦Eb·Ts/Ipp in which Eb is a source voltage, Ts is the time from the completion of a flyback pulse to the start of the next flyback pulse, and Ipp is the allowed current of the FET
16
. Conventionally, such a high voltage generation circuit is designed such that the above-mentioned condition is satisfied, and a required output voltage can be obtained from the secondary winding of the transformer
12
.
However, if the FET is turned on nearly at the peak of the quiescent ringing pulse as shown in
FIG. 3
, the high voltage of the quiescent ringing pulse is instantaneously terminated. Thus, the ringing which is determined by the distributed capacitance of the transformer
12
and so forth is generated, so that overshoot and undershoot occur in current flowing through the primary winding of the transformer
12
. The generation of such overshoot and undershoot causes a problem in that losses in the transformer
12
and a resistance loss in the ringing suppression circuit are increased.
SUMMARY OF THE INVENTION
Accordingly, it is a principal object of the present invention to provide a high voltage generation circuit in which the loss caused by overshoot and undershoot when the switching element is turned on can be reduced.
According to the present invention, there is provided a high voltage generation circuit which comprises a transformer, a power supply for supplying power to the primary winding of the transformer, a switching element for controlling current flowing through the primary winding of the transformer from the power supply, and a resonance capacitor which resonates with the primary winding of the transformer when the switching element is off, so that a flyback pulse is generated, the switching element being controlled so as to be switched on nearly at the bottom of a quiescent ringing pulse which is produced by the resonance of the inductance of the primary winding of the transformer with the capacitance included in a circuit connected to the primary winding of the transformer, after the flyback pulse is generated.
In the high voltage generat
Kitamoto Masahiko
Nagai Tadao
Naito Kenji
Takiguchi Hisashi
Umemoto Tsuyoshi
Han Jessica
Murata Manufacturing Co. Ltd.
Ostrolenk Faber Gerb & Soffen, LLP
LandOfFree
High voltage circuit does not yet have a rating. At this time, there are no reviews or comments for this patent.
If you have personal experience with High voltage circuit, we encourage you to share that experience with our LandOfFree.com community. Your opinion is very important and High voltage circuit will most certainly appreciate the feedback.
Profile ID: LFUS-PAI-O-2961293