Miscellaneous active electrical nonlinear devices – circuits – and – Specific identifiable device – circuit – or system – With specific source of supply or bias voltage
Patent
1997-08-21
1999-03-23
Cunningham, Terry D.
Miscellaneous active electrical nonlinear devices, circuits, and
Specific identifiable device, circuit, or system
With specific source of supply or bias voltage
327390, 327537, G05F 302
Patent
active
058865667
ABSTRACT:
An improved charge transfer stage with an expanded output voltage range and high charge transfer efficiency is described. The charge transfer stage can be implemented as an output stage in a four phase clock negative charge pump system. The charge transfer stage comprises a PMOS pass transistor coupling the transfer stage input and output, a resistor between the transfer stage input and the pass transistor gate, a clock terminal, a capacitor configured PMOS transistor coupling the clock terminal to the gate of the pass transistor, and a diode from the transfer stage output to ground. When the transfer stage input goes low, charge is coupled through the resistor to pre-charge the gate of the pass transistor. The resistor has a higher junction breakdown voltage than a transistor which allows the gate of the pass transistor to be driven to a larger voltage. To provide sufficient charge to turn on the pass transistor, a logic high level greater than the power supply, such as 2 VCC, can be used for the clock signal coupled through the capacitor configured transistor to the gate of the pass transistor. To prevent the 2 VCC logic high level from forward biasing the p-n junction formed by the source and drain of the PMOS capacitor configured transistor with the well, the source, drain and well are coupled together. The charge transfer stage also includes a p-n junction diode coupled from the output of the stage to ground.
REFERENCES:
patent: 5029063 (1991-07-01), Lingstaedt et al.
patent: 5422590 (1995-06-01), Coffman et al.
patent: 5489870 (1996-02-01), Arakawa
patent: 5589793 (1996-12-01), Kassapian
patent: 5701096 (1997-12-01), Higashiho
Hung Hsi-Hsien
Park Eungjoon
Cunningham Terry D.
Integrated Silicon Solution Inc.
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