High voltage bubble memory pulse generator output stage

Details High voltage bubble memory pulse generator output stage High voltage bubble memory pulse generator output stage

1982-08-27

1984-10-09

Wong, Peter S.

Electricity: power supply or regulation systems

Input level responsive

323350, 323271, G05F 500

Patent

active

044764294

ABSTRACT:
A circuit for providing the gate of a bubble memory with a precision current pulse at a high voltage is manufactured using a low voltage process; i.e. BV.sub.ceo is approximately 18 volts. In order to accomplish this, first and second voltage level shifting stages are cascoded and the output transistors thereof are used as Zener level shifters each level shifting downward by a BV.sub.ceo when only a small voltage is dropped across the load. If the voltage drop across the load increases, the cascoded output transistors may enter their active region and are prevented from going into saturation by saturation clamps so as to not introduce unwanted delays in the rise or fall times of the current pulse.

REFERENCES:
patent: 3202904 (1965-08-01), Madland
patent: 3488562 (1970-01-01), Rovell
patent: 3622865 (1971-11-01), Lee, Jr.
patent: 4355277 (1982-10-01), Davis et al.

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