High voltage booster circuit for use in EEPROMs

Details High voltage booster circuit for use in EEPROMs High voltage booster circuit for use in EEPROMs

1988-07-29

1990-04-10

James, Andrew J.

Electrical transmission or interconnection systems

Nonlinear reactor systems

Parametrons

307264, 307482, 307578, 365191, 365226, 365104, H03K 1710, H03K 3027, H03K 17687, G11C 1140

Patent

active

049163345

ABSTRACT:
A semiconductor integrated circuit includes a CMOS circuit operated on a voltage of a first voltage level to set an output node thereof to a voltage of the first voltage level or a reference voltage; an output circuit for controlling supply of a voltage of a second voltage level which is higher than the first voltage level to a signal output node; and an isolation MOS transistor having a current path connected between the output node of the CMOS circuit and the signal output node and a gate connected to receive a control signal. The output node of the CMOS circuit is set to the reference voltage with the conduction resistance of the isolation MOS transistor kept high after the lapse of period in which the voltage of the second voltage level is kept supplied to the signal output node. After this, the conduction resistance of the isolation MOS transistor is reduced in response to the control signal.

REFERENCES:
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patent: 4506350 (1985-03-01), Asano et al.
patent: 4555644 (1985-11-01), Devecchi et al.
patent: 4565932 (1986-01-01), Kuo et al.
patent: 4616143 (1986-10-01), Miyamoto
patent: 4628218 (1986-12-01), Nakaizumi
patent: 4698526 (1987-10-01), Allan
patent: 4767950 (1988-08-01), Schrenk

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