High-throughput data processing system equipped with cache memor

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3649579, 364DIG1, G06F 1212

Patent

active

054127904

ABSTRACT:
A cache memory system immediately supplies data codes to a central processing unit, and new data codes are written from the central processing unit into the cache memory system so as to enhance the hit ratio. The new data codes are transferred to a main memory system while there are no predicted bus requests or communication between the central processing unit, the main memory system, and the cache memory system, so that data throughput is improved without negatively affecting the hit ratio.

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patent: 5091846 (1992-02-01), Sachs et al.
patent: 5113515 (1992-05-01), Fite et al.
patent: 5168557 (1992-12-01), Shibuya
patent: 5265213 (1993-11-01), Weiser et al.

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