High-throughput data buffer

Details High-throughput data buffer High-throughput data buffer

1995-07-24

1998-06-30

Eng, David Y.

G06F 1300

Patent

active

057746532

ABSTRACT:
The invention relates to a pipeline buffer for simultaneously transferring N words at each of a succession of clock cycles (CK), comprising N one-word side memories (M0-M3) successively connected such that successive memories each are accessed with one clock cycle delay. The N memories are subjected to the same read or write cycles by control circuitry.

REFERENCES:
patent: 4602331 (1986-07-01), Sheth
patent: 5222047 (1993-06-01), Matsuda et al.
patent: 5313501 (1994-05-01), Thacker
patent: 5454093 (1995-09-01), Abdulhafiz et al.
patent: 5537640 (1996-07-01), Pawlowski
Manolis Katevenis, "Weighted Round-Robin Cell Multiplexing in a General-Purpose ATM Switch Chip", IEEE Journal on Selected Areas in Communications, vol. 9, No. 8, Oct. 1991, pp. 1265-1279.

Affiliated with

Also associated with

Rating

High-throughput data buffer does not yet have a rating. At this time, there are no reviews or comments for this patent.

If you have personal experience with High-throughput data buffer, we encourage you to share that experience with our LandOfFree.com community. Your opinion is very important and High-throughput data buffer will most certainly appreciate the feedback.

Rate now

Comments { 0 }

Profile ID: LFUS-PAI-O-1869537