Active solid-state devices (e.g. – transistors – solid-state diode – Combined with electrical contact or lead – Of specified material other than unalloyed aluminum
Reexamination Certificate
2011-03-22
2011-03-22
Williams, Alexander O (Department: 2826)
Active solid-state devices (e.g., transistors, solid-state diode
Combined with electrical contact or lead
Of specified material other than unalloyed aluminum
C257SE23141, C257SE21001, C257S712000, C257S713000, C257S717000, C257S720000, C257S707000, C257S711000, C257S704000, C257S675000, C257S668000, C257S774000, C257S680000
Reexamination Certificate
active
07911059
ABSTRACT:
A method and apparatus for packaging semiconductor dies for increased thermal conductivity and simpler fabrication when compared to conventional semiconductor packaging techniques are provided. The packaging techniques described herein may be suitable for various semiconductor devices, such as light-emitting diodes (LEDs), central processing units (CPUs), graphics processing units (GPUs), microcontroller units (MCUs), and digital signal processors (DSPs). For some embodiments, the package includes a ceramic substrate having an upper cavity with one or more semiconductor dies disposed therein and having a lower cavity with one or more metal layers deposited therein to dissipate heat away from the semiconductor dies. For other embodiments, the package includes a ceramic substrate having an upper cavity with one or more semiconductor dies disposed therein and having a lower surface with one or more metal layers deposited thereon for efficient heat dissipation.
REFERENCES:
patent: 5475264 (1995-12-01), Sudo et al.
patent: 5506755 (1996-04-01), Miyagi et al.
patent: 5847935 (1998-12-01), Thaler et al.
patent: 5883428 (1999-03-01), Kabumoto et al.
patent: 6118502 (2000-09-01), Yamazaki et al.
patent: 6121637 (2000-09-01), Isokawa et al.
patent: 6711813 (2004-03-01), Beyne et al.
patent: 6713862 (2004-03-01), Palanisamy et al.
patent: 2004/0159919 (2004-08-01), Doi et al.
patent: 2006/0200958 (2006-09-01), deRochemont et al.
patent: 2007/0228541 (2007-10-01), Lin et al.
patent: 2007/0262387 (2007-11-01), Nonaka et al.
patent: 2007/0297108 (2007-12-01), Collins et al.
patent: 2009/0126903 (2009-05-01), Kuibira et al.
patent: 10215001 (1998-08-01), None
patent: 2002232017 (2002-08-01), None
patent: 2005101616 (2005-04-01), None
patent: 2006206963 (2006-08-01), None
Peter Van Zant, Microchip Fabrication, 2000, McGraw-Hill, Fourth Edition, pp. 400 and 401.
U.S. Appl. No. 11/382,296, filed May 9, 2006.
Cheng Ching-Tai
Yen Jui-Kang
Patterson & Sheridan L.L.P.
SeniLEDS Optoelectronics Co., Ltd
Williams Alexander O
LandOfFree
High thermal conductivity substrate for a semiconductor device does not yet have a rating. At this time, there are no reviews or comments for this patent.
If you have personal experience with High thermal conductivity substrate for a semiconductor device, we encourage you to share that experience with our LandOfFree.com community. Your opinion is very important and High thermal conductivity substrate for a semiconductor device will most certainly appreciate the feedback.
Profile ID: LFUS-PAI-O-2720900