Active solid-state devices (e.g. – transistors – solid-state diode – Thin active physical layer which is – Tunneling through region of reduced conductivity
Reexamination Certificate
1998-04-24
2002-11-05
Flynn, Nathan J. (Department: 2826)
Active solid-state devices (e.g., transistors, solid-state diode
Thin active physical layer which is
Tunneling through region of reduced conductivity
C257S031000, C257S034000, C438S002000
Reexamination Certificate
active
06476413
ABSTRACT:
The present invention to superconductor Josephson junctions and dc superconducting quantum interference devices (SQUIDs) and to high temperature superconductor Josephson junctions and SQUIDs. This invention is the result of a contract with the United States Department of Energy (Contract No. W-7405-ENG-36).
BACKGROUND OF THE INVENTION
There are several junction configurations exhibiting Josephson effects. For example, Josephson junctions have previously been made on a bi-crystal substrate (see U.S. Pat. No. 5,278,140), but this technique generally requires an expensive substrate typically running as high as $400 per square centimeter. Another type of Josephson junction has a structure referred to as a vertical SNS wherein a substrate includes a superconductive (S) layer followed by a layer of a normal metal (N) of 20-30 Angstroms, followed by another layer of a superconductive (S) material. This type of structure suffers from construction problems since it is very difficult to grow a uniform, pinhole-flee, ultra-thin normal metal layer on high temperature superconductors. As a result, this type structure has seen little further development. Yet another type of Josephson junction has a structure referred to as a step edge S-N-S (see U.S. Pat. No. 5,367,178). The junction performance with this structure is very sensitive to the N-layer overlap with the S layer, step height, step slope, and deposition temperature for N-layer materials. Still another type of Josephson junction has a stepped structure with a superconductive layer over a stepped substrate relying on weak links at the turns or corners of the steps (referred to as a step-edge junction). Still another type of Josephson junction has a structure with a very narrow region formed by a beam damage process to create weak links in a weakened junction. Still another design for a Josephson junction (referred to as an edge-geometry or ramp-edge SNS) typically includes a substrate having a first superconductive layer deposited thereon and an insulator layer upon the superconductive (S) layer, both layers of the composite structure having a slanted (10-20 degrees) or ramp edge design. Then, a thin layer of a normal metal (N) is deposited over the prior composite structure and finally a second superconductive layer is deposited upon the normal metal layer.
Edge-geometry SNS structure provides several advantages compared to other junction technologies. The most important feature of the edge-geometry SNS store is that such a device can be put anywhere on a chip without affecting other devices. This feature is very important for the fabrication of complicated circuitry. Since this device can be patterned by a standard photolithography process, this planar device can be fabricated in a batch process. Also, the theoretical device performance depends on the N-layer thickness and resistivity. Furthermore, device performance is expected to be quite stable because of the lack of grain-boundary related problems.
Among the superconductive layers typically used in the various Josephson junction structures have been included, e.g., yttrium-barium-copper-oxide, gadolinium-barium-copper-oxide, bismuth-strontium-calcium-copper-oxide, and thallium-calcium-barium-copper-oxide. Among the normal metals typically employed in edge-geometry SNS junctions are included, e.g., calcium-ruthenium-oxide, strontium-ruthenium-oxide, ytrrium-praseodymium-barium-copper-oxide with the praseodymium serving as a dopant to change the electrical properties, calcium-doped ytrrium-barium-copper-oxide, cobalt-doped ytrrium-barium-copper-oxide, niobium-doped strontium-titanium-oxide, lanthanum-strontium-cobalt-oxide and lanthanum-strontium-copper-oxide.
Despite the extensive research to date on edge-geometry SNS Josephson junctions, problems remain in reproducibility and controllability of the junction performance. These problems stem from the superconductor material itself and also from the fabrication process. The interface between S/N or N/S has been recognized as the most important controlling factor in determining the performance of SNS junctions. The difficulty in controlling the interface comes from several aspects. The interface between S/N or N/S can be degraded due to the anisotropic properties of high-temperature superconductors, the mismatch in the lattice and thermal expansion coefficient between superconductor and N-layer, the chemical incompatibility between superconductor electrode and N-layer, the growth of the multilayer thin film on a ramp edge instead of on a flat surface around the active area of the device, the damage to the superconductor bottom electrode surface from ion-beam used to pattern the film, and the unavoidable grain-boundaries from the intrinsic island growth mechanism.
It is an object of the present invention to provide high performance Josephson junctions and SQUIDs solving the above mentioned problems. By engineering superconducting material in the fabrication of edge-geometry SNS Josephson junctions and SQUIDs, devices with reproducible and controllable properties have been fabricated.
It is a further object of the invention to develop functional high temperature superconductor thin films to fabricate related thin film devices (Josephson junctions, SQUIDs, microwave filters, transformers, and the like) with superior performance.
SUMMARY OF THE INVENTION
To achieve the foregoing and other objects, and in accordance with the purposes of the present invention, as embodied and broadly described herein, the present invention provides an edge-geometry SNS Josephson junction device including a substrate, a first electrode including yttrium-barium-copper oxide and silver upon the substrate, an insulating or highly resistive layer upon a portion of the first electrode, said first electrode and said insulating or highly resistive layer further characterized as having one side of this combination configured in a ramp edge shape, a layer of a normal metal or a layer that functions as a normal metal at operating temperatures of the device upon the ramp edge of the first electrode and the insulating material, and, a second electrode including yttrium-barium-copper oxide and silver upon the layer of normal metal. In another embodiment, the normal metal layer further includes silver.
The present invention further provides an edge-geometry SNS Josephson junction device including a substrate, a first electrode including yttrium-barium-copper oxide upon the substrate, an insulating or highly resistive layer upon a portion of the first electrode, said first electrode and said insulating or highly resistive layer further characterized as having one side of this combination configured in a ramp edge shape, a layer of a normal metal or a layer that functions as a normal metal at operating temperatures of the device upon the ramp edge of the first electrode and the insulating material, the normal metal layer including a portion of silver, and, a second electrode including yttrium-barium-copper oxide upon the layer of normal metal.
The present invention further provides a process for preparing a Josephson junction device including forming a first electrode including yttrium-barium-copper oxide and silver upon a substrate; depositing a layer of a material characterized as insulating or highly resistive at opting temperatures of the device, the material having chemical and structural compatibility with the first electrode to form an intermediate composite structure; depositing a photoresist material upon a portion of the intermediate composite structure; etching off selected areas of the intermediate composite structure; removing the photoresist material to yield an etched intermediate composite structure; depositing a layer of a normal metal or a layer that functions as a normal metal at operating temperatures of the device upon selected areas of the etched intermediate composite structure; and, depositing a second electrode including yttrium-barium-copper oxide and silver upon the layer of normal metal. In another embodiment, the normal metal layer further i
Foltyn Steven R.
Jia Quanxi
Reagor David W.
Wu Xin Di
Cottrell Bruce H.
Flynn Nathan J.
The Regents of the University of California
Wilson Scott R
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