Active solid-state devices (e.g. – transistors – solid-state diode – Combined with electrical contact or lead – Of specified material other than unalloyed aluminum
Reexamination Certificate
1998-10-07
2001-09-18
Chaudhuri, Olik (Department: 2814)
Active solid-state devices (e.g., transistors, solid-state diode
Combined with electrical contact or lead
Of specified material other than unalloyed aluminum
C257S764000
Reexamination Certificate
active
06291889
ABSTRACT:
FIELD OF THE INVENTION
The present invention relates generally to high density multi-layer integrated circuit modules for integrating infrared detector arrays to signal conditioning electronics, and more particularly to thin-film microcircuits with fine lines and pitches of 30 microns or less.
BACKGROUND OF THE INVENTION
Space-based surveillance systems use infrared detectors coupled to computerized data processors for monitoring heated objects and their movements in the atmosphere below and on the ground. The infrared spectrum covers a wide range of wavelengths, from about 0.75 micrometers to 1 millimeter. The function of infrared detectors is to respond to energy of a wavelength within some particular portion of the infrared region. Heated objects dissipate thermal energy having characteristic wavelengths within the infrared spectrum. Different levels of thermal energy, corresponding to different sources of heat, are characterized by the emission of signals within different portions of the infrared frequency spectrum. Detectors are selected in accordance with their sensitivity in the range of interest to the designer. Similarly, electronic circuitry that receives and processes the signals from the infrared detectors is also selected in view of the intended detection function.
Current infrared detection systems incorporate arrays of large number of discrete, highly sensitive detector elements, the outputs of which are connected to sophisticated processing circuitry. By rapidly analyzing the pattern and sequence of detector element excitation, the processing circuitry can identify and monitor sources of infrared radiation. It is difficult, however, to actually construct structures that are made of a million or more detector elements and associated circuitry. Practical applications for contemporary infrared detection systems have necessitated that further advances be made in miniaturization of the detector array and accompanying circuitry, and improvements in reliability and economical production.
In the prior art, a number of detector array modules have been proposed for coupling an array of closely spaced detectors to processing circuitry. Such modules are typically formed such that all connection to and from the module are disposed on a first horizontal layer, with electronic devices and connecting circuitry disposed within the module on one of several stacked horizontal layers interconnected by vertical conductors, known as vias, extending through the layers. A principal shortcoming of this construction is that a single layer is unduly congested with connections to all detectors and external electronics and must also support a large number of vias extending to the parallel layers. The number of detector elements that may be connected as well as the number of connectors to external electronics that support on-focal plane processors are thereby limited by the size of the connecting layer and the minimum width and spacing of the conductors.
Other modules proposed in the prior art address the congestion and space optimization by orienting the detector array perpendicular to the plane of the module layers, adjacent to one edge of the module. Such constructions are commonly referred to as “Z-technology architectures”. Z-technology modules are typically formed by stacking multiple layers of thin-film substrates and bump bonding an end of each layer to an adjacent row of the detector array. Conductors extending along the surface of the substrates have end portions that are carefully aligned to contact leads from the individual detector elements. Such constructions advantageously avoid wiring congestion associated with connecting all detectors to a single module layer and reduce the accompanying need for vertical vias that detract from the useable space with the module. The detector arrays have pixels which are typically less than a 100 microns apart and are integrated to the modules by flip-chip bump bonding.
To maintain an interconnect directly behind each pixel in the Z direction the module layers must be kept very thin, usually less than one pixel center-to-center spacing. The layers, which are ceramic substrates having thin-film microcircuits printed thereupon, are laminated using extremely thin thermal setting adhesive sheets. A principal shortcoming to this laminated multi-layer assembly is the poor dimension stability that exists due to a mismatch of the coefficients of expansion between the ceramic layers and the thermal set adhesive sheets. To alleviate this problem in the past, a thermal-stress barrier commonly known as a buffer board, was used to absorb the thermal stress from the module. The buffer board was placed between the infrared detector arrays and the module and thus provides for electrical and mechanical interconnection therebetween.
A fused multi-layer module was disclosed by Hornback, U.S. Pat. No. 5,128,749 (also assigned to Grumman Corporation), the entire disclosure of which is hereby incorporated by reference. Hornback disclosed a glass binding material that adhesively attached adjacent substrate layers together. The glass binding material has a coefficient of expansion approximately equal to the coefficient of expansion of the substrate layers such that the thermal stress is reduced and the need for a buffer board is consequently eliminated. The glass binding material has a low temperature of melting point between 400-550° C., and bonds adjacent substrate layers utilizing firing durations of less than twenty minutes.
Thin-films have been in general use for well over a hundred years. Among the earliest uses were decorative thin-films on glass and ceramics. From the early examples have evolved the diverse types of thin-films currently used. Included are thin-films used for protective and insulating purposes, as well as conductive thin-films used in micro-electronics. Chemical vapor deposition is the most common technique for forming thin-film materials on substrate surfaces. Reactants are absorbed by the substrate and a chemical reaction and diffusion occur on the surface.
It is important that high temperatures either in the field or during manufacturing processing not degrade thin-film metallization once it is deposited. Patterns in the microcircuits may be damaged as a result of diffusion, migration, and oxidation, which may cause the thin-film materials to form hillocks or lose their adhesion to the substrate. Thin-film circuits are generally not used with high temperature applications nor processed at temperatures above 400° C. Instead, thick film materials are used but they cannot achieve the same fine line geometries as required in the thin-film microcircuits.
More specifically, in the Z-technology ceramic multi-chip modules, thin-film materials are sputter deposited onto thin-film grade alumina (99.6% Al
2
O
3
) substrates and delineated to form the required microchip patterns. Sputtering is a process in which material is removed from a source (the cathode) and accelerated through a plasma and deposited on the substrate (the anode). Then individual pattern layers are laminated together to form a multi-layer Z-module using a glass fusion-lamination technique, as described in Hornback, U.S. Pat. No. 5,128,749. The fusion-lamination process uses low temperature firable glass at temperatures as high as 600° C. with pressure up to 300 kN/m
2
. Under these conditions, however, microcircuits made with sputtered thin-film materials have failed on the conventional substrates due to the factors described above.
In view of the shortcomings of the prior art it is desirable to provide thin-film microcircuits with fine lines and pitches, that are resistant to high temperature processing and operating conditions.
SUMMARY OF THE INVENTION
The present invention specifically addresses and alleviates the above deficiencies associated with the prior art. Generally, the present invention comprises a substrate of a high purity alumina ceramic that is densely packed with small grain size, and a sputtered thin-film metallization system deposited on the substrate to form a
Koh Wei
Louie Wesley J.
Anderson Terry J.
Cao Phat X.
Chaudhuri Olik
Hoch, Jr. Karl J.
Northrop Grumman Corporation
LandOfFree
High temperature resistant thin-film system does not yet have a rating. At this time, there are no reviews or comments for this patent.
If you have personal experience with High temperature resistant thin-film system, we encourage you to share that experience with our LandOfFree.com community. Your opinion is very important and High temperature resistant thin-film system will most certainly appreciate the feedback.
Profile ID: LFUS-PAI-O-2535957