Semiconductor device manufacturing: process – Forming schottky junction – Using refractory group metal
Reexamination Certificate
2006-06-16
2009-02-17
Toledo, Fernando L (Department: 2895)
Semiconductor device manufacturing: process
Forming schottky junction
Using refractory group metal
C438S237000, C438S589000, C257S330000
Reexamination Certificate
active
07491633
ABSTRACT:
A power Schottky rectifier device and method of making the same are disclosed. The Schottky rectifier device includes a LOCOS structure grown on the bottom of the trenches by using nitride spacer on the sidewall of the trenches as a thermal oxidation mask. A polycrystalline silicon layer is then filled the first trenches. Under LOCOS structure, a p doped region is optionally formed to minimize the current leakage when the device undergoes a reverse biased. A Schottky barrier silicide layer formed by sputtering and annealing steps is formed on the upper surfaces of the epi-layer and the polycrystalline silicon layer. A top metal layer served as anode is then formed on the Schottky barrier silicide layer and extended to cover a portion of field oxide region of the termination trench. A metal layer served as a cathode electrode is then formed on the backside surface of the substrate opposite to the top metal layer.
REFERENCES:
patent: 7064408 (2006-06-01), Wu
patent: 7078780 (2006-07-01), Wu
patent: 7323402 (2008-01-01), Chiola
patent: 2005/0230744 (2005-10-01), Wu
patent: 2008/0087896 (2008-04-01), Chiola
Birch & Stewart Kolasch & Birch, LLP
Chip Integration Tech. Co., Ltd.
Toledo Fernando L
Wu Shye-Lin
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