High storage capacity non-volatile memory

Static information storage and retrieval – Floating gate – Multiple values

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Details

36518511, 36523003, 36523006, G11C 1604

Patent

active

061479020

ABSTRACT:
A memory device has an array of memory cells, including at least one memory block including multiple-level memory cells adapted for storing each one N.gtoreq.2 bits of information. The at least one memory block also includes electrically erasable and programmable bilevel memory cells, each for storing one bit of information. A circuit is provided for either accessing and reading one of said multiple-level memory cell or simultaneously accessing and reading N of said electrically erasable and programmable bilevel memory cells, depending on address signals supplied to the memory device.

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patent: 5596526 (1997-01-01), Assar et al.
patent: 5717632 (1998-02-01), Richart et al.
patent: 5754469 (1998-05-01), Hung et al.
patent: 5844841 (1998-12-01), Takeuchi et al.
patent: 5905673 (1999-05-01), Khan

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