High speed wordline decoder for driving a long wordline

Static information storage and retrieval – Addressing – Particular decoder or driver circuit

Reexamination Certificate

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Details

C365S230080

Reexamination Certificate

active

06999373

ABSTRACT:
A method and apparatus for improving the performance of a memory wordline decoder is disclosed. A decoder latch is attached to an inverter which drives the wordline. Additionally, a voltage pump can supply operating voltage to the inverter to assist in overdriving the wordline. A voltage sink can also be coupled to the inverter which, in combination with the voltage pump, can be used to shift the output voltages used to turn the wordline on and off. A second inverter can also be added, and in such a case the transistors within the latch and the first inverter can be reduced in size, switching time, and power consumption.

REFERENCES:
patent: 5282167 (1994-01-01), Tanaka et al.
patent: 5412331 (1995-05-01), Jun et al.
patent: 5862098 (1999-01-01), Jeong
patent: 5982701 (1999-11-01), Eto
patent: 6044035 (2000-03-01), Kohno
patent: 6141291 (2000-10-01), Kohno
patent: 6538955 (2003-03-01), Kohno

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