High-speed verifiable semiconductor memory device

Details High-speed verifiable semiconductor memory device High-speed verifiable semiconductor memory device

2007-12-18

2007-12-18

Le, Vu A. (Department: 2824)

Static information storage and retrieval

Floating gate

Particular connection

C365S185190

Reexamination Certificate

active

11682741

ABSTRACT:
A memory cell stores several data using n (n: natural number more than 1) threshold voltages. A voltage supply circuit supplies a predetermined voltage to a gate of the memory cell in a verify operation of verifying whether or not the memory cell reaches a predetermined threshold voltage. A detection circuit connected to one terminal of the memory cell charges one terminal of the memory cell to a predetermined potential. The detection circuit detects the voltage of one terminal of the memory cell based on a first detection timing, and further, detects the voltage of one terminal of the memory cell based on a second detection timing.

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