High speed variable length decoding processor

Coded data generation or conversion – Digital code to digital code converters – To or from variable length codes

Reexamination Certificate

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Details

C341S061000, C341S106000, C382S246000

Reexamination Certificate

active

06459391

ABSTRACT:

BACKGROUND OF THE INVENTION
1. Field of the Invention
This invention relates to an operation unit, and more particularly to an operation unit which is capable of high-speed variable-length decoding in, for example, a general-purpose processor.
2. Description of Related Art
FIG. 4
shows an exemplary structure of a conventional VLD (variable-length decoding) circuit which utilizes a general-purpose processor.
For example, a transport system based on MPEG-2 (Moving Picture Experts Group) is supplied to a DMUX (demultiplexer)
3
, and the DMUX
3
separates the elementary stream of a video and audio from the transport stream. A video elementary stream obtained in the DMUX
3
is supplied to a main memory
2
through a bus
4
and stored in a main memory
2
.
The main memory
2
stores the video elementary stream supplied from the DMUX
3
as described herein above and has a stored program for operating a general-purpose processor
1
as a VLD circuit, and the general-purpose processor
1
decodes a variable-length code stored in the main memory
2
by operating the program stored in the main memory
2
.
In detail, the general-purpose processor
1
comprises an instruction fetch section
11
, an instruction decoder
12
, and an ALU (Arithmetic Logic Unit)
13
, a register group
14
, a cache memory
15
, and an internal bus
16
, and the program stored in the main memory
2
is supplied to the cache memory
15
through the bus
14
occasionally and stored therein.
The instruction fetch section
11
suitably fetches a command (instruction) which constitutes the program stored in the cache memory
15
and supplies it to the instruction decoder
12
. The instruction decoder
12
decodes a command supplied from the instruction fetch section
11
and supplies the decoded result to the ALU
13
. The ALU
13
performs various general processes as required according to the decoded result supplied from the instruction decoder
12
while reading and writing the data from and in the register group
14
.
In detail, the main memory
2
has the stored program used for variable-length decoding, and the ALU
13
performs processes required for variable-length decoding.
In detail, a video elementary stream stored in the main memory
2
is occasionally transferred to the cache memory
15
through the bus
4
and stored therein. The video elementary stream stored in the cache memory
15
is occasionally transferred to the register
14
through the internal bus
16
and stored therein, and subjected to variable-length decoding in the ALU
13
.
The register group
14
comprises, for example, a plurality of 32 bit registers, and in the ALU
13
, any one of these registers is assigned to the buffer Bfr (video stream data buffer) which stores a variable-length code to be subjected to variable-length decoding out of variable-length codes which are components of the video elementary stream (therefore, the buffer Bfr is 32 bits), and the data stored in the buffer Bfr is subjected to general-operation corresponding to functions such as show_bits(), get_bits(), and flush_buffer() to perform variable-length decoding.
The function show_bits (int N) is for observing N bits from MSB (Most Significant Bit) of the buffer Bfr, and described as shown herein under, for example, in C language. unsigned mnt show_bits(int N)
{
return Bfr>>(32-N)
}
According to the function show_bits (int N), the content of the buffer Bfr that is one register of the register group
14
as shown in
FIG. 5A
is copied in another register (temporary register) Temp of the register group
14
, and shifted to the right by 32-N bits (Bfr>>(32-N)). As the result, N bits are set from MSB of the buffer Bfr to lower N bits of the register Temp as shown in
FIG. 5C
, and this is returned as the functional value of the function show_bits (int N) (return Bfr>>(32-N)). In this case, the stored value of the buffer Bfr is not changed.
In the case that higher N bits of the buffer Bfr observed in the function show_bits() and get_bits() are discarded and the number of bits of the stored value of the buffer Bfr that remains residual after discarding is equal to or smaller than the maximum length of the variable-length code, the function flush_buffer (int N) reads the subsequent data from the cache memory
15
for supplement, for example, it is described as shown herein under in C language:
void flush_buffer (int N) {
Bfr<<=N;
Incnt−=N;
if (Incnt<=24){
do{
bfr |=*Rdptr++<<(24-Incnt);
Incnt+=8;
} while (Incnt<=24);
} else {
. . .
}
}
The variable Rdptr is a pointer to the address (position) of a variable-length code to be read out next in the video elementary stream stored in the cache memory
15
, one of the registers which are components of the register group
14
is assigned to the variable Rdptf. The variable Incnt is a variable for storing the length of the data which has not been subjected to variable-length decoding out of the data stored in the buffer Bfr, one of the registers which are components of the register group
14
is assigned to the variable Incnt.
According to the function flush_buffer (int N), as shown in
FIG. 6A
, when variable-length decoding of the higher N bits of the buffer Bfr is completed, the stored value of the buffer Bfr is bit-shifted to the left by N bits (Bfr<<=N), and as the result the stored value of the buffer Bfr is changed as shown in FIG.
6
B.
The variable Incnt is decremented by N, and the variable Incnt is changed so as to indicate the length of the data (portion described as Next_data in FIG.
6
B and
FIG. 6D
) which has not been subjected to variable-length decoding after the stored value of the buffer Bfr is left-shifted by N bits as shown in FIG.
6
B.
Furthermore, in the case that the variable Incnt after changing is equal to or shorter than the maximum length (herein, for example, 24 bits) of the variable-length code (if (Incnt <=24), stuffing process is performed, that is, the data subsequent to the data which has not been subjected to variable-length decoding stored in the buffer Bfr is read out from cache memory
15
and supplemented until the variable Incnt exceeds 24 bits, namely the maximum length of the variable-length code (while (Incnt<=24)).
In detail, the pointer Rdptr is incremented by 1 (Rdptr++), and the data (which is the component of the video elementary stream) stored at the address pointed to by the pointer is read out from the cache memory
15
. Herein it is assumed that, for example, 8-bit data is stored at the address of the cache memory
15
which is pointed to by the pointer Rdptr. The 8-bit data stored at the address pointed to by the pointer Rdptr is read out from the cache memory
15
.
The 8-bit data nd (represented by Rdptr) read out from the cache memory
15
is stored in the lower 8 bits of one of the registers which are components of the register group
14
through the internal bus
18
. The ALU
13
reads out the stored value of the register where the 8-bit data nd is stored, and shifts to the left by 24-Incnt bits as shown in
FIG. 6C
(Rdptr++<<(24-Incnt)).
Furthermore, the ALU
13
operates OR (referred to as bit OR suitably) for each bit of the bit shift result (
FIG. 6C
) and the stored value (
FIG. 6B
) of the buffer Bfr, and stores the operation result in the buffer Bfr (bfr |=Rdptr++<<(24-Incnt)) as shown in FIG.
6
D. As the result, the data (
FIG. 6D
) formed by supplementing the data (
FIG. 6B
) which has remained residual after the higher N bits of the original stored value (
FIG. 6A
) has been discarded and which has not been subjected to variable-length decoding with the subsequent 8-bit data is stored in the buffer bfr.
The ALU
13
increments the variable Incnt which represents the length of the data which has not been subjected yet to variable-length decoding out of the data stored in the buffer Bfr by 8 namely the data qu

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