Electrical transmission or interconnection systems – Nonlinear reactor systems – Parametrons
Patent
1991-12-31
1993-12-28
Westin, Edward P.
Electrical transmission or interconnection systems
Nonlinear reactor systems
Parametrons
307463, 36523006, H03K 1920, H03K 19082
Patent
active
052742784
ABSTRACT:
In a memory array in which logic signals of a first and a second voltage levels are used for selecting memory positions in the array for read operations and at least one signal of a voltage level higher than the first and second voltage levels may appear, and including a plurality of wordlines each joined to a common node by individual row decoders, a predecoder circuit for selecting a plurality of wordlines from which a row decoder may select an individual wordline including a full CMOS NAND gate arranged to provide output voltage levels of the first and a second voltage levels, a plurality of weak P channel devices each connected to one of the wordlines, means for operating the weak P channel devices to provide voltage levels of the higher level and below at the wordlines, means for limiting value of voltage transferred to the common point to be less than the higher voltage level, and means for limiting the level of the voltage transferred to the common node from the NAND gate to be less than a predetermined level.
REFERENCES:
patent: 4455629 (1984-06-01), Suzuki et al.
patent: 4820941 (1989-04-01), Dolby et al.
patent: 4953133 (1990-08-01), Kashimura
patent: 4982372 (1991-01-01), Matsuo
patent: 5062082 (1991-10-01), Choi
Bauer Mark E.
Hazen Peter
Sweha Sherif
Intel Corporation
Roseen Richard
Westin Edward P.
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