High speed testing of integrated circuit

Electrical pulse counters – pulse dividers – or shift registers: c – Systems – Identifying or correcting improper counter operation

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365201, 365236, 371 24, G06F 1108, G11C 2900

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active

047575239

ABSTRACT:
A register of the type used on as address counter in a dynamic RAM is tested by a method which does not require cycling through every possible value of the register contents. The counter is first loaded with a fixed value, all 1's or all 0's, and the contents checked by an AND or OR gate, producing a one-bit output which is monitored off-chip. Then, the carry feedback path to the counter register is altered, as by inverting all but the LSB, and the contents again checked, using the one-bit output via the AND or OR. In this manner, the operation of the counter is tested in three cycles.

REFERENCES:
patent: 4156819 (1979-05-01), Takahashi et al.
patent: 4189635 (1980-02-01), Sheller
patent: 4195770 (1980-04-01), Benton et al.
patent: 4419747 (1983-12-01), Jordan
patent: 4519090 (1985-05-01), Stackhouse et al.

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