High speed system for grey level image scaling, threshold matrix

Details High speed system for grey level image scaling, threshold matrix High speed system for grey level image scaling, threshold matrix

1996-03-04

1998-06-23

Moore, David K.

Facsimile and static presentation processing

Facsimile

Specific signal processing circuitry

358457, G06K 936, H04N 140

Patent

active

057711054

ABSTRACT:
A system converts a source image of grey level pixel values into a destination image of binary pixel values, the source and destination images having different levels of resolution. The system includes a memory which stores at least a portion of a row of source pixels, a corresponding row of a grey level threshold matrix and a relative input index array (RIIA) which employs a single index bit for each column of the destination image. Index bits are read from the memory and placed in an index bit register, and N source pixel values are written into a source register. A scale logic circuit includes N destination image column outputs and is responsive to each index bit, to output one grey level source pixel on each output. An alignment switch is responsive to a clock input to provide N threshold pixel value outputs that are aligned with corresponding destination image pixels. A comparator compares each source grey level pixel with a corresponding threshold pixel value and assigns a binary value in accordance with the comparison action. A controller initially loads the registers with values from the memory and then synchronously operates the system to output, in parallel, N destination image binary pixel values per clock cycle.

REFERENCES:
patent: 4246614 (1981-01-01), Knox
patent: 5124803 (1992-06-01), Troxel
patent: 5297289 (1994-03-01), Mintzer
patent: 5305118 (1994-04-01), Schiller et al.
patent: 5422742 (1995-06-01), Ostromoukhov et al.
patent: 5438431 (1995-08-01), Ostromoukhov
patent: 5526445 (1996-06-01), Smutek et al.

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