High-speed synchronous counter circuitry

Details High-speed synchronous counter circuitry High-speed synchronous counter circuitry

1995-05-24

1999-08-24

Wambach, Margaret Rose

Electrical pulse counters, pulse dividers, or shift registers: c

Particular transfer means

Including logic circuit

H03K 2116

Patent

active

059433868

ABSTRACT:
Digital counter register stages are constructed as two-to-one mux registers, each employing a multiplexer stage having first, second, and third inputs and an output connected to the switching signal input of a D-type flip-flop, whose Q output comprises a first input to the multiplexer stage. An inverter buffer is associated with each register stage and has an input connected to the output of said D-type flip-flop and an output connected to the second input of the multiplexer stage and fed forward to a NOR gate associated with each subsequent register stage. The output of the NOR gate comprises the third input to the multiplexer stage of the associated register stage.

REFERENCES:
patent: 5060243 (1991-10-01), Eckert

Affiliated with

Also associated with

Rating

High-speed synchronous counter circuitry does not yet have a rating. At this time, there are no reviews or comments for this patent.

If you have personal experience with High-speed synchronous counter circuitry, we encourage you to share that experience with our LandOfFree.com community. Your opinion is very important and High-speed synchronous counter circuitry will most certainly appreciate the feedback.

Rate now

Comments { 0 }

Profile ID: LFUS-PAI-O-474046