High speed synchronization circuit

Details High speed synchronization circuit High speed synchronization circuit

1979-12-05

1982-02-23

Miller, Jr., Stanley D.

Electrical transmission or interconnection systems

Nonlinear reactor systems

Parametrons

307452, 307480, 328 72, H03K 1908, H03K 117

Patent

active

043170536

ABSTRACT:
In a high speed synchronizing circuit, the rising edge of an asynchronous input signal is used to set an input RS flip-flop. First and second latch registers monitor the input RS flip-flop. Each latch register generates a reset signal before a change in the logic level of the system clock for resetting the input RS flip-flop. The reset pulses are very narrow which enables the RS flip-flop to be quickly conditioned to receive the next asynchronous signal.

REFERENCES:
patent: 3942037 (1976-03-01), Mensch, Jr.
patent: 3953744 (1976-04-01), Kawagoe
patent: 3997800 (1976-12-01), Bain
patent: 4011465 (1977-03-01), Alvarez, Jr.

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