High speed switching field effect transistor

Details High speed switching field effect transistor High speed switching field effect transistor

1986-11-26

1988-09-20

Carroll, J.

357 4, 357 16, 357 61, H01L 2980, H01L 29161, H01L 2712, H01L 29205

Patent

active

047729252

ABSTRACT:
The semiconductor device of this invention consists at least of a laminate of a semi-insulating or p-type first semiconductor layer having a forbidden band width E.sub.g1, an undoped or p.sup.- -type second semiconductor layer having a forbidden band width E.sub.g2 and an n-type third semiconductor layer having forbidden band width E.sub.g3. The laminate is deposited on a predetermined semiconductor substrate and the forbidden band width has the relation E.sub.g2 <E.sub.g1, E.sub.g3. A pair of electrodes are so formed as to come into contact at least with the interface between the second and third semiconductor layers, and a control electrode, which forms a Schottky junction with the third semiconductor layer, is formed at a predetermined position interposed between the pair of electrodes. The semiconductor device has excellent pinch-off characteristic.

REFERENCES:
patent: 4157556 (1979-06-01), Decker et al.
patent: 4195935 (1980-03-01), Dingle et al.
patent: 4424525 (1984-01-01), Mimura
J. Barnard et al, "Double Heterostructure Ga.sub.0.47 In.sub.0.53 MESFETs with Submicron Gates", IEEE Electron Dev. Letters, vol. EDL-1 (1980), pp. 174-176.
V. Mimura et al., "A New Field-Effect Transistor with Selectively Doped GaAs/a-Al,CA, hd xGa.sub.1- As Heterojunctions, Japanese Journal of Applied Physics, vol. 19 (1980), pp. L225-L227.

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