High-speed single-ended interface

Details High-speed single-ended interface High-speed single-ended interface

2004-11-24

2009-06-30

Torres, Juan A (Department: 2611)

Pulse or digital communications

Systems using alternating or pulsating current

Plural channels for transmission of a single pulse train

C375S354000, C375S365000

Reexamination Certificate

active

07555048

ABSTRACT:
Circuits, methods, and apparatus for transmitting, receiving, aligning and re-synchronizing high-speed single-ended signals by aligning a clock signal to one or more received data signals. A receiver amplifier circuit senses and captures low swing single ended signals at the receiver. Alignment is done on a per pin basis where a clock signal is distributed and independently phase shifted and aligned to each incoming data signal. In one example, a preamble containing a training data pattern is transmitted. The receiver steps through a number of dynamic timing alignment codes, each of which selects a different phase-shifted clock signal. The received data is examined for errors and the optimal clock signal is selected. Periodic dynamic readjustments of multiple clock alignment circuits may be made to compensate for temperature and voltage drift and variations.

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