High speed signals distribution for backplanes

Electricity: electrical systems and devices – Housing or mounting assemblies with diverse electrical... – For electronic systems and devices

Reexamination Certificate

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C333S100000

Reexamination Certificate

active

06239985

ABSTRACT:

TECHNICAL FIELD
The invention relates to distribution of signals in a circuit board and more particularly to backplanes and mother boards having a multi-point electrical topology and distribute high speed signals such as clock signals.
BACKGROUND ART
Circuit boards in the form of backplanes and mother boards provide the backbones that drive most computer systems. They generally exist in the form of printed circuit boards (PCB) containing various logic, memory, or microprocessor devices and interface mechanisms, frequently plugged into connectors or receiving slots into which additional cards containing such components can be plugged. The actual PCB manufacturing techniques have improved, making features smaller and allowing larger PCB with increasing numbers of components capable of performing at ever-increasing speeds to be mounted on today's circuit boards. Thus, many backplanes and motherboards used in large computers and control equipment now feature PCB's with many components with extremely fine land (wires) or electrical conductors widths interconnecting them.
One major problem in such PCBs involves the difficulty in delivering a synchronized high speed signal (such as clocks in the order of several tens of megahertz) to cards and modules which can be mounted anywhere on the backplane. In addition, backplanes may be either fully populated with cards and other components or have any combination of full or empty receiving slots which create variable capacitance load. Moreover, no predetermined slot is assigned to a card delivering a clock signal and the backplane must provide reliable transmission characteristics whatever the configuration of the circuit board and its slots may be (i.e., whether the slots are populated or not and wherever the clock is located).
U.S. Pat. No. 5,696,667 issued to Berding discloses a data processing system that includes a backplane with logic boards connected to the backplane by a plurality of connectors. A set of common points is electrically coupled to the connectors by individual conductive traces between each common point and the corresponding pins of the connectors. The common points are preferably centrally located among the plurality of connectors to reduce propagation delay. In one embodiment, the electrical conductors to the connectors nearest the common points have a minimum length greater than the distance between the nearest connectors and the common points. While this solution addresses some of the problems, however several drawbacks still result. A first one is that the position of the card delivering the clock signal (also called driver card), is restricted to specific slots locations, with some locations being identified as “worst case” positions in term of signal quality. Such limitation is not acceptable from a design perspective, since designers prefer a system free of any plug-in constraint.
Another drawback with the existing solutions is the inability to correctly simulate or predict the propagation of a signal particularly to evaluate the lines reflections in all possible backplane configurations. In fact, it has been shown that for a given receiver card located at a distance ‘Dn’ from a common point, the reflections due to the unterminated lines cause the signal at the input of the receiver card to be dependent of the presence (capacitively loaded transmission lines) or the absence (open transmission lines) of other receiver cards and also to be dependent of the distance ‘Dn’. According to the prior art solution, it has been computed that a 17 slots backplane leads to about several hundreds of thousands configurations combining both the distance ‘Dn’ and the presence/absence of other cards.
Consequently, another drawback of the prior art solution is the inability to completely eliminate the reflections caused by the multiple unterminated transmission lines, either open or capacitively loaded. As stated by Berding in the aforementioned patent, the commercially available drives are unable to be terminated by parallel resistors in the range of variable transmission line impedance. Nevertheless, it is known to connect series-resistors either close to the common point or close to the driver component to decrease the amount of reflections. The resistor value is generally adjusted to fit all machine configurations from the lightly loaded one (with only a few cards) to the fully loaded one (one with cards in substantially all the slots).
Accordingly, it would be desirable to be able to provide a new backplane which eliminates the aforementioned problems.
SUMMARY OF THE INVENTION
It is therefore an object of this invention to provide a circuit board or backplane for achieving a reliable high speed signal distribution.
The present invention provides a circuit board or backplane having a distribution of transmission lines arranged in a logical circular topology. Specifically, the backplane comprises a printed circuit board and a plurality of connectors attached to the backplane for receiving logic cards. Each of the connectors may have a plurality of pins, with one corresponding to the clock. A corresponding pin from each connector is electrically coupled by a separate electrical conductor (i.e., a wire) to a common point by individual wire. The electrical conductors are so arranged that each of the plurality of conductors have substantially the same length.
In a preferred embodiment, the common point is located approximately in the middle of the circuit board or backplane, while the plurality of connectors are linearly located symmetrically to the common point.
In addition, each of the plurality of electrical conductors is arranged in a u-shape. The length of the base of each u-shaped conductor is proportional to the distance between the common point and the connected pin of the corresponding connector.


REFERENCES:
patent: 5119273 (1992-06-01), Corda
patent: 5319526 (1994-06-01), Takashima
patent: 5548734 (1996-08-01), Kolinski et al.
patent: 5696667 (1997-12-01), Berding
patent: 5930119 (1999-07-01), Berding

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