High speed shift register

Details High speed shift register High speed shift register

1980-08-21

1983-04-05

Shaw, Gareth D.

Electrical pulse counters, pulse dividers, or shift registers: c

Shift register

Particular transfer means

377 73, G06F 504

Patent

active

043792227

ABSTRACT:
A high speed shift register device includes first and second shift registers. Odd numbered bits of a word are stored in the first shift register and even numbered bits of the word are stored in the second shift register. The first shift register is clocked by a clock signal, and the second shift register is clocked by the complement of the clock signal. The outputs of the first and second shift registers are alternately shifted by means of a multiplexer to an output conductor. A control input of the multiplexer is connected to the clock input. Data is shifted out of the multiplexer at a rate which is twice the normal shifting rate of each of the first and second shift registers.

REFERENCES:
patent: 3333255 (1967-07-01), Loev
patent: 3851187 (1974-10-01), Pao et al.
TTL Data Book, Texas Instruments Inc., 2nd Edition, 1976, pp. 6-89 thru 6-92.

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