Coded data generation or conversion – Digital code to digital code converters – Serial to parallel
Reexamination Certificate
2011-04-12
2011-04-12
Lauture, Joseph (Department: 2819)
Coded data generation or conversion
Digital code to digital code converters
Serial to parallel
C341S101000
Reexamination Certificate
active
07924184
ABSTRACT:
An integrated circuit (e.g., a programmable integrated circuit such as a programmable microcontroller, a programmable logic device, etc.) includes programmable circuitry and a channel of high-speed serial data signal interface (e.g., transceiver) circuitry. To facilitate enabling the integrated circuit to support any of many possible different high-speed serial communication protocols, the channel is hard-wired to include a parallel data bus of fixed width for exchanging parallel data with the programmable circuitry. Regardless of the protocol being implemented, the full width of this bus is always used. A portion of the programmable circuitry is programmed to convert data between the block width and a group width, which can be different from the block width and which is used for the data elsewhere in the integrated circuit.
REFERENCES:
patent: 6631144 (2003-10-01), Johansen
patent: 7684532 (2010-03-01), Aung et al.
“Virtex-4 RocketIO Multi-Gigabit Transceiver User Guide,” UG076 (v4.0), Xilinx, pp. 1-339, Aug. 17, 2007 (see especially Figures 2-4, 2-5, 2-7, and 2-8).
Chan Allen
Shumarayev Sergey
Wong Wilson
Altera Corporation
Jackson Robert R.
Lauture Joseph
Ropes & Gray LLP
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