High speed sensor system using a level shift circuit

Details High speed sensor system using a level shift circuit High speed sensor system using a level shift circuit

1991-01-04

1991-10-01

Hudspeth, David

Electrical transmission or interconnection systems

Nonlinear reactor systems

Parametrons

307279, H03F 345

Patent

active

050536524

ABSTRACT:
A semiconductor memory device has a sense amplifier which is constructed with a level shift circuit having an input which senses the change in a data line from an initial precharged level to a level near the vicinity of the supply voltage level which corresponds to data reading amounts from a memory cell during the reading mode of operation of the memory. The level shift circuit, in response to a memory cell reading signals, provides a level shifted outpout to the input terminal of a differential sense amplifier circuit, the level shifted output being in the vicinity of the operating point of the differential sense amplifier circuit. The level shift circuit includes a current amplifier having an output terminal that is formed with a series connecting node of a current amplifying transistor and a current source.

REFERENCES:
patent: 4618785 (1986-10-01), Van Tran
patent: 4724344 (1988-02-01), Watanabe
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"A 64Kb Static Ram", Digest of Technical Papers, pp. 236-237 (1980 IEEE Int. Solid State Circuits Conference, Feb. 15, 1980), by T. Ohzone et al.

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