High speed sensing circuit for a memory device

Static information storage and retrieval – Floating gate – Particular biasing

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3651852, 365207, G11C 1604

Patent

active

060785241

ABSTRACT:
A sensing circuit for sensing the binary state of a memory cell includes a first transistor wherein the first spaced-apart region is connected to a first voltage source, and the gate is connected to a second voltage source, a second transistor wherein the first spaced-apart region of the second transistor is connected to the second spaced-apart region of the first transistor, and a third transistor wherein the first spaced-apart region is connected to the second spaced-apart region of the second transistor, the gate is electrically connected to the memory cell, and the second spaced-apart region is connect to a ground potential. The circuit also includes a circuit to generate a first current in response to one binary state of the memory cell and a second current in response to another binary state of the memory cell wherein a feedback circuitry is created between the circuitry to generate currents and the second transistor, and a circuit to produce output signals in response to the first current and the second current.

REFERENCES:
patent: 5386158 (1995-01-01), Wang
patent: 5519652 (1996-05-01), Kumakura et al.
patent: 5528543 (1996-06-01), Stiegler
patent: 5757697 (1998-05-01), Briner
patent: 5910914 (1999-06-01), Wang

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