High-speed sampling phase detector for clock and data recovery s

Details High-speed sampling phase detector for clock and data recovery s High-speed sampling phase detector for clock and data recovery s

1988-03-28

1989-06-20

Grimm, Siegfried H.

Oscillators

Automatic frequency stabilization using a phase or frequency...

With reference oscillator or source

307516, 328134, 328151, 375 81, 375120, H03D 1300, H03L 708

Patent

active

048412570

ABSTRACT:
A high-speed sample and hold phase detector for clock and data recovery systems is provided with a differentiating circuit coupled to a source of coded input data signals to provide bi-level differentiated output sampling pulses which are applied to a high-speed transformer. The output of the high-speed transformer is coupled to a high-speed fullwave diode bridge rectifying circuit whose output provides the error signal for the clock and data recovery circuit. The transformer is provided with a secondary winding having a center tap connected to a bi-level clock having clock signals whose rate is at twice the data rate. The D.C. error signal voltage amplitude is proportional to the phase difference between the clock signal connected to the center tap of the secondary winding of the transformer and the differentiated sampling pulses. The sampling pulses are employed to sample the clock signal which provides higher stability and enhances noise reduction.

REFERENCES:
patent: 3721829 (1973-03-01), Benson
patent: 4424497 (1984-01-01), Fellinger
patent: 4634998 (1987-01-01), Crawford

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