High speed, reduced power memory system implemented according to

Static information storage and retrieval – Magnetic bubbles – Guide structure

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365227, 364707, G06F 132, G11C 1140

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056873824

ABSTRACT:
A memory system including a first memory area (MEM-A) implemented using memory units including low threshold voltage transistors powered by a low supply voltage source, and a second memory area (MEM-B) implemented using memory units including higher threshold voltage cells powered by a higher supply voltage source. The first memory area, MEM-A, is designated to contain frequently accessed variables, with less frequently accessed variables designated for storage in the second memory area, MEM-B. The most frequently accessed variables stored in MEM-A provide for fast access at a low power per access power dissipation level due to the lower supply voltage and lower threshold voltage design. Alternatively, the less frequently accessed variables stored in MEM-B require a high power per access, but negligible leakage current during static steady state conditions.

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